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PDF LTC1427-50 Data sheet ( Hoja de datos )

Número de pieza LTC1427-50
Descripción Micropower/ 10-Bit Current Output DAC with SMBus Serial Interface
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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No Preview Available ! LTC1427-50 Hoja de datos, Descripción, Manual

LTC1427-50
Micropower, 10-Bit Current
Output DAC with SMBus
Serial Interface
FEATURES
s Precision 50µA, ±1.5% Initial Full-Scale Output
Current, ±2.5% Over Temperature
s Wide Output Voltage DC Compliance: – 15V to
(VCC – 1.3V)
s Wide Supply Range: 2.7V VCC 5.5V
s Supply Current in Shutdown: 10µA Typ
s Low Supply Current: 115µA Typ
s Available in 8-Pin SO
s SMBus Serial Interface
s Four Selectable SMBus Addresses
s DAC Powers Up at Zero or Midscale
s DAC Contents Are Retained in Shutdown
U
APPLICATIONS
s LCD Contrast and Backlight Brightness Control
s Power Supply Voltage Adjustment
s Battery Charger Voltage/Current Adjustment
s GaAs FET Bias Adjustment
s Trimmer Pot Elimination
DESCRIPTION
The LTC®1427-50 is a micropower, 10-Bit current output
DAC with an output range of 0µA to 50µA. The DAC output is
guaranteed monotonic and DNL is less than 0.9LSB under all
operating conditions. Full-scale accuracy is ±2.5% over
the commercial temperature range. The LTC1427-50 oper-
ates with power supply voltages from 2.7V to 5.5V and the
DAC current source output can be biased from (VCC – 1.3V)
to – 15V.
The LTC1427-50 communicates with external circuitry by
using the SMBus serial interface. It acts as an SMBus slave
device using one of four selectable SMBus addresses set by
the two address pins AD0 and AD1 .
On power-up, the DAC output assumes midrange or zero
scale, depending on the logic state of the two address pins.
The LTC1427-50 can be shut down through the SHDN pin or
by setting the SHDN bit = 1 in the SMBus command byte.
Digital data for the DAC output is retained internally and the
supply current drops to 10µA typically when in shutdown.
The LTC1427-50 is available in an 8-pin SO package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
Digitally Controlled LCD Bias Generator
L1 D1
VOUT*
2 TO 4
CELLS
SHDN
1µF
65
VIN SW
LT1317
3
SHDN
FB
2
R1
226k
1%
GND VC
41
R2
12.1k
1%
4700pF
100k
C1
1µF
L1 = 10 µH SUMIDA CD43
MURATA-ERIE LQH3C
OR COILCRAFT DO1608
D1 =MBR0530
*VOUT = 12.7V TO 24V IN 11mV STEPS
15mA (2 CELLS)
35mA ( 3 CELLS)
VCC
3.3V
LTC1427-50
1
SHDN
2
AD1
3
AD0
8
VCC
7
IOUT
6
SCL
4
GND
5
SDA
µPU
(e.g., 8051)
P1.2
P1.1
P1.0
1427 TA02
1

1 page




LTC1427-50 pdf
LTC1427-50
PIN FUNCTIONS
SHDN (Pin 1): Shutdown. A logic low puts the chip into
shutdown mode. In shutdown, the digital settings for the
DAC are retained. On release from shutdown, the previ-
ously programmed value for IOUT is reinstated.
AD1, AD0 (Pins 2, 3): Address Selection Pins. Tie these
two pins to either VCC or GND to select one of four SMBus
addresses to which the LTC1427-50 will respond.
GND (Pin 4): Ground. Ground should be tied directly to a
ground plane.
SDA (Pin 5): SMBus Bidirectional Data Input/Digital Out-
put. This pin is an open-drain output and requires a pull-
up resistor or current source to VCC. Data is shifted into the
SDA pin and acknowledged by the SDA pin.
SCL (Pin 6): SMBus Clock Input. Data is shifted into the
SDA pin at the rising edges of the SCL clock during data
transfer.
IOUT (Pin 7): DAC Current Output.
VCC (Pin 8): Voltage Supply. This supply must be kept free
from noise and ripple by bypassing directly to the ground
plane.
FU CTIO TABLES
AD1 AD0
LL
LH
HL
HH
SMBus Address Location
0101101
0101111
0101110
0101100
DAC Power-Up Value
Zero-Scale
Zero-Scale
Zero-Scale
Midscale
Application
CCFL Backlight Control
General Purpose
General Purpose
LCD Contrast Control
BLOCK DIAGRAM
SCL
SMBUS
INTERFACE
SDA
AD0 AD1
SD
POWER-ON
RESET
SHDN
3 REGISTER A 1
3-BIT
LATCH
EN1 2
8
REGISTER B
1-BIT LATCH
EN2 SHDN
REGISTER C
10-BIT
LATCH
EN2
10
VOLTAGE
REFERENCE
SD
SD
10-BIT
CURRENT
DAC
RADJ
IOUT
1427 BD
5

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