|
|
PDF LTC1421CG Data sheet ( Hoja de datos )
| Número de pieza | LTC1421CG | |
| Descripción | Hot Swap Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de LTC1421CG (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
|
No Preview Available !
LTC1421/LTC1421-2.5
Hot Swap Controller
FEATURES
s Allows Safe Board Insertion and Removal from a
Live Backplane
s System Reset and Power Good Control Outputs
s Programmable Electronic Circuit Breaker
s User Programmable Supply Voltage Power-Up Rate
s High Side Driver for Two External N-Channels
s Controls Supply Voltages from 3V to 12V
s Connection Inputs Detect Board Insertion or Removal
s Undervoltage Lockout
s Power-On Reset Input
U
APPLICATIONS
s Hot Board Insertion
s Electronic Circuit Breaker
, LTC and LT are registered trademarks of Linear Technology Corporation.
Hot Swap is a trademark of Linear Technology Corporation.
DESCRIPTION
The LTC®1421/LTC1421-2.5 are Hot SwapTM controllers
that allow a board to be safely inserted and removed from a
live backplane. Using external N-channel pass transistors,
the board supply voltages can be ramped up at a program-
mable rate. Two high side switch drivers control the N-
channel gates for supply voltages ranging from 3V to 12V.
A programmable electronic circuit breaker protects against
shorts. Warning signals indicate that the circuit breaker
has tripped, a power failure has occurred or that the switch
drivers are turned off. The reset output can be used to
generate a system reset when the power cycles or a fault
occurs. The two connect inputs can be used with stag-
gered connector pins to indicate board insertion or re-
moval. The power-on reset input can be used to cycle the
board power or clear the circuit breaker.
The trip point of the ground sense comparator is set at
0.1V for LTC1421 and 2.5V for LTC1421-2.5.
The LTC1421/LTC1421-2.5 are available in 24-pin SO and
SSOP packages.
TYPICAL APPLICATION
VEE
VDD
VCC
FAULT
POR
GND
DATA
BUS
BACKPLANE PC BOARD
R1 Q1
0.005Ω MTB50N06E
C3
0.47µF
R2 Q2
0.025Ω 1/2 Si4936DY
D1
R3
1k
2
24
C1
1µF
4
3
1
23 22 21
20 19
VCCLO SETLO GATELO VOUTLO VCCHI
CON2
AUXVCC
FAULT
LTC1421
POR
CON1 GND
DISABLE
18 17 16
SETHI GATEHI VOUTHI
RAMP
CPON
COMP –
COMP +
REF
FB
COMPOUT
PWRGD
RESET
10
9
14
13
8
11
15
6
7
Q3
1/2 Si4936DY
R4
20k
C5
+ 220µF
5%
+ C3
220µF
R6 +
C2 20k
0.1µF R5 1%
16k
5%
C4
220µF
1µF R7
7.15k
1%
µP
I/O
I/O
RESET
VEE
– 12V
1A
VDD
12V
1A
VCC
5V
5A
12
5
1
13
BEA
BEB
VCC
12 GND
DATA BUS
QS3384
QuickSwitch®
QuickSwitch IS A REGISTERED TRADEMARK
OF QUALITY SEMICONDUCTOR CORPORATION.
1421 TA01
1
1 page  
LTC1421/LTC1421-2.5
TYPICAL PERFORMANCE CHARACTERISTICS
CPON Voltage vs Source Current
(Charge Pump On)
5
VCCLO = 5V
VCCHI = 12V
4
3
2
1
0
0 – 0.5 – 1.0 – 1.5 – 2.0 – 2.5 – 3.0
SOURCE CURRENT (mA)
1421 G10
ICCLO Supply Current
vs VCCLO Voltage
7
VCCHI = 12V
6
5
4
3
2
1
0
02
4 6 8 10
VCCLO VOLTAGE (V)
12 14
1421 G11
PIN FUNCTIONS
CON1 (Pin 1): TTL Level Input with a Pull-Up to VCCLO.
Together with CON2, it is used to indicate board connec-
tion. The pin must be tied to ground on the host side of the
connector. When using staggered connector pins, CON1
and CON2 must be the shortest and must be placed at
opposite corners of the connector. Board insertion is
assumed after CON1 and CON2 are both held low for 20ms
after power-up.
CON2 (Pin 2): TTL Level Input with a Pull-Up to VCCLO.
Together with CON1 it is used to indicate board connec-
tion.
POR (Pin 3): TTL Level Input with a Pull-Up to VCCLO.
When the pin is pulled low for at least 20ms, a hard reset
is generated. Both VOUTLO and VOUTHI will turn off at a
controlled rate. A power-up sequence will not start until
the POR pin is pulled high. If POR is pulled high before
VOUTLO and VOUTHI are fully discharged, a power-up
sequence will not begin until the voltage at VOUTLO and
VOUTHI are below VTRIP. The electronic circuit breaker will
be reset by pulling POR low.
FAULT (Pin 4): Open Drain Output to GND with a Weak
Pull-Up to VCCLO. The pin is pulled low when an overcur-
rent fault is detected at VOUTLO or VOUTHI.
DISABLE (Pin 5): CMOS Output. The signal is used to
disable the board’s data bus during insertion or removal.
PWRGD (Pin 6): Open Drain Output to GND with a Weak
Pull-Up to VCCLO. The pin is pulled low immediately after
VOUTLO falls below its reset threshold voltage. The pin is
pulled high immediately after VOUTLO rises above its reset
threshold voltage.
RESET (Pin 7): Open Drain Output to GND with a Weak
Pull-Up to VCCLO. The pin is pulled low when a reset
condition is detected. A reset will be generated when any
of the following conditions are met: Either CON1 or CON2
is high, POR is pulled low, VCCLO or VCCHI are below their
respective undervoltage lockout thresholds, PWRGD goes
low or an overcurrent fault is detected at VOUTLO or
VOUTHI. RESET will go high 200ms after PWRGD goes
high. On power failure, RESET will go low 32µs after
PWRGD goes low.
REF (Pin 8): The Reference Voltage Output. VOUT = 1.232V
±1%. The reference can source up to 5mA of current. A
1µF bypass capacitor is recommended.
CPON (Pin 9): CMOS Output That Can Be Pulled Below
Ground. CPON is pulled high when the internal charge
pumps for GATELO and GATEHI are turned on. CPON is
pulled low when the charge pumps are turned off. The pin
can be used to control an external MOSFET for a – 5V to
– 12V supply.
5
5 Page 
LTC1421/LTC1421-2.5
APPLICATIONS INFORMATION
is connected between REF (Pin 8) and the negative supply
and the trip point of Comparator 2 set to GND.
Soft Reset Generation
A soft reset that doesn’t cycle the supply voltage can be
generated externally using Pin 11 (FB) as shown in Figure
9. For a 5V supply the FB pin is left floating to set the
internal supply monitor trip voltage to 4.65V. However, if
the FB pin is pulled to ground for more than 64µs via a push
button or open-collector logic gate, the internal trip point
will go to 5.88V and the RESET pin will pull low. RESET will
remain low for 200ms after the FB pin is released. The
RESET signal will also be pulled low when the voltage at
the VOUTLO pin dips below 4.65V for more than 32µs.
When using a 3.3V supply, a 1k resistor must be con-
nected from the FB pin to VCCLO to set the internal trip point
to 2.90V.
1/6 LS7404
OPEN
COLLECTOR
3.3V
R1 USED FOR 3.3V
R1 SUPPLY ONLY
1k
11 7
FB RESET
5V
RESET
LTC1421
LOGIC
GND
12
64µs
FB
200ms
RESET
1421 F09
Figure 9. Generating a Soft Reset
Undervoltage Lockout
On power-up, an undervoltage lockout circuit prevents the
GATELO and GATEHI charge pumps from turning on until
VCCLO and VCCHI have both exceeded 2.45V.
Electronic Circuit Breaker
The LTC1421 features an electronic circuit breaker func-
tion that protects against short circuits or excessive cur-
rents on the supplies. By placing a sense resistor between
the supply input and set pin of either supply, the circuit
breaker will be tripped whenever the voltage across the
sense resistor is greater than 50mV for more than 20µs.
When the circuit breaker trips, both N-channel MOSFETs
are quickly turned off, FAULT and PWRGD go low and
RESET is pulled low 32µs later. FAULT can be connected
to a LED or a logic signal back to the host to indicate a faulty
board. The chip will remain in the tripped state until a
power-on reset is generated, or the power on VCCHI and
VCCLO is cycled. If the circuit breaker feature is not used,
short VCCLO to SETLO and VCCHI to SETHI.
If more than 20µs of response time is needed to reject
supply noise, an external resistor and capacitor can be
added to the sense circuit as shown in Figure 10.
RSENSE
Q1
CF RF
23
VCCLO
22
SETLO
21
GATELO
LTC1421
20
VOUTLO
1421 F10
Figure 10. Short-Circuit Protection Circuit
Auxiliary VCC
When a short circuit occurs on the board, it is possible to
draw enough current to cause the backplane supply
voltage to collapse. If the input supply voltage collapses to
a low enough voltage and the LTC1421 gate drive circuitry
is unable to shut off the N-channel pass transistors, the
system might freeze up in a permanent short condition.
To prevent this from occurring, the gate discharge cir-
cuitry inside the LTC1421 is powered from AUXVCC,
which is in turn powered from VCCLO through an internal
Schottky diode and current limiting resistor (Figure 11).
VCCLO
23
GATELO GATEHI
21 17
10k
AUXVCC
24
1µF
GATE DRIVE
CIRCUITRY
LTC1421
1421 F11
Figure 11. AUXVCC Circuitry
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet LTC1421CG.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| LTC1421CG | Hot Swap Controller | Linear Technology |
| LTC1421CSW | Hot Swap Controller | Linear Technology |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |