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PDF LTC1266-3.3 Data sheet ( Hoja de datos )
| Número de pieza | LTC1266-3.3 | |
| Descripción | Synchronous Regulator Controller for N- or P-Channel MOSFETs | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC1266
LTC1266-3.3/LTC1266-5
Synchronous Regulator
Controller for
N- or P-Channel MOSFETs
FEATURES
DESCRIPTIO
s Ultrahigh Efficiency: Over 95% Possible
s Drives N-Channel MOSFET for High Current or
P-Channel MOSFET for Low Dropout
s Pin Selectable Burst Mode Operation
s 1% Output Accuracy (LTC1266A)
s Pin Selectable Phase of Topside Driver for Boost
or Step-Down Operation
s Wide VIN Range: 3.5V to 20V
s On-Chip Low-Battery Detector
s High Efficiency Maintained Over Large Current Range
s Low 170µA Standby Current at Light Loads
s Current Mode Operation for Excellent Line and Load
Transient Response
s Logic Controlled Micropower Shutdown: IQ < 40µA
s Short-Circuit Protection
s Synchronous Switching with Nonoverlaping Gate Drives
s Available in 16-Pin Narrow SO Package
U
APPLICATIO S
s Notebook and Palmtop Computers
s Portable Instruments
s Cellular Telephones
s DC Power Distribution Systems
s GPS Systems
The LTC®1266 series is a family of synchronous switching
regulator controllers featuring automatic Burst ModeTM
operation to maintain high efficiencies at low output
currents. These devices drive external power MOSFETs at
switching frequencies up to 400kHz using a constant off-
time current mode architecture providing constant ripple
current in the inductor. They can drive either an N-channel
or a P-channel topside MOSFET.
The operating current level is user-programmable via an
external current sense resistor. Wide input supply range
allows operation from 3.5V to 18V (20V maximum).
Constant off-time architecture provides low dropout regu-
lation limited only by the RDS(ON) of the topside MOSFET
(when using the P-channel) and the resistance of the
inductor and current sense resistor.
The LTC1266 series combines synchronous switching for
maximum efficiency at high currents with an automatic
low current operating mode, called Burst Mode operation,
which reduces switching losses. Standby power is re-
duced to only 1mW at VIN = 5V (at IOUT = 0). Load currents
in Burst Mode operation are typically 0mA to 500mA.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
VIN
4V TO 9V +
CIN
100µF
×2
LOW BAT IN
0V = NORMAL
>1.5V = SHUTDOWN
RC
470Ω
CC
3300pF
CT
180pF
*TOKO 919AS-4R7M
VIN
LBIN
PWR VIN
LBOUT
PINV
TDRIVE
LTC1266-3.3
SHDN SENSE+
ITH
CT
BINH
SENSE –
BDRIVE
SGND PGND
D2
MBR0530T1
N-CHANNEL
Si9410
1000pF
N-CHANNEL
Si9410
CB
0.1µF
LOW BAT OUT
100k
L* RSENSE
5µH 0.02Ω
VOUT
3.3V
5A
+
D1
MBRS130LT3
1266 TA01
COUT
330µF
×2
Figure 1. High Efficiency Step-Down Converter
LTC1266-3.3 Efficiency
100
VIN = 5V
95
90
85
80
0.01
0.1 1
LOAD CURRENT (A)
5
1266 TA02
1
1 page  
TYPICAL PERFOR A CE CHARACTERISTICS
LTC1266
LTC1266-3.3/LTC1266-5
Efficiency vs Input Voltage
100
FIGURE 1 CIRCUIT
95
90
ILOAD = 5A
85
ILOAD = 2.5A
80 ILOAD = 100mA
75
70
3
45 67
INPUT VOLTAGE (V)
89
1266 G01
Efficiency vs Input Voltage
100
FIGURE 11 CIRCUIT
95 ILOAD = 1A
ILOAD = 2.5A
90
85 ILOAD = 100mA
80
75
70
0
4 8 12 16
INPUT VOLTAGE (V)
20
1266 G04
VIN DC Supply Current
3.0
2.5
2.0 ACTIVE MODE
1.5
1.0
0.5
0
0
SLEEP MODE
4 8 12 16
INPUT VOLTAGE (V)
20
1266 G07
Line Regulation
40
FIGURE 1 CIRCUIT
30 ILOAD = 1A
20
10
0
–10
–20
–30
– 40
3
4567
INPUT VOLTAGE (V)
Line Regulation
40
FIGURE 11 CIRCUIT
30 ILOAD = 1A
20
10
0
–10
–20
–30
– 40
0
4 8 12
INPUT VOLTAGE (V)
89
1266 G02
16
1266 G05
Power VIN DC Supply Current
25
20
ACTIVE MODE
15
10
5
SLEEP MODE
0
0 4 8 12 16 20
INPUT VOLTAGE (V)
1266 G08
Load Regulation
20
FIGURE 1 CIRCUIT
10
VIN = 9V (Burst Mode
0 OPERATION ENABLED)
–10 VIN = 5V
–20
–30
VIN = 5V (Burst Mode
–40 OPERATION INHIBITED)
–50
0
1234
LOAD CURRENT (A)
5
1266 G03
Load Regulation
30
FIGURE 11 CIRCUIT
20
10
0 VIN = 12V (Burst Mode
OPERATION ENABLED)
–10
VIN = 5V
–20 VIN = 5V (Burst Mode
OPERATION INHIBITED)
–30
–40
0
0.5 1.0 1.5 2.0 2.5
LOAD CURRENT (A)
3.0
1266 G06
Supply Current in Shutdown
50
40
VIN
30
20
10
PWR VIN
0
0 5 10 15 20
INPUT VOLTAGE (V)
1266 G09
5
5 Page 
LTC1266
LTC1266-3.3/LTC1266-5
APPLICATIO S I FOR ATIO
From the duty cycles, the required RDS(ON) for each
MOSFET can be derived:
TS RDS(ON) =
BS RDS(ON) =
VIN • PT
VOUT • IMAX2 • (1 + δT)
VIN • PB
(VIN – VOUT) • IMAX2 • (1 + δB)
where PT and PB are the allowable power dissipations and
δT and δB are the temperature dependencies of RDS(ON). PT
and PB will be determined by efficiency and/or thermal
requirements (see Efficiency Considerations). For a MOSFET,
(1 + δ) is generally given in the form of a normalized
RDS(ON) vs temperature curve, but δPCH = 0.007/°C and
δNCH = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The minimum input voltage determines whether standard
threshold or logic-level threshold MOSFETs must be used.
For VIN > 8V, standard threshold MOSFETs (VGS(TH) < 4V)
may be used. If VIN is expected to drop below 8V, logic-
level threshold MOSFETs (VGS(TH) < 2.5V) are strongly
recommended. The LTC1266 series Power VIN must al-
ways be less than the absolute maximum VGS ratings for
the MOSFETs.
The Schottky diode D1 shown in Figure 1 only conducts
during the deadtime between the conduction of the two
power MOSFETs. D1’s sole purpose in life is to prevent the
body diode of the bottom-side MOSFET from turning on
and storing charge during the deadtime, which could cost
as much as 1% in efficiency (although there are no other
harmful effects if D1 is omitted). Therefore, D1 should be
selected for a forward voltage of less than 0.7V when
conducting IMAX.
CIN and COUT Selection
In continuous mode, the current through the topside
MOSFET is a square wave of duty cycle VOUT/VIN. To
prevent large voltage transients, a low ESR (Effective
Series Resistance) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
CIN
Required
IRMS
≈
IMAX
[VOUT(VIN – VOUT)]1/2
VIN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is com-
monly used for design because even significant devia-
tions do not offer much relief. Note that capacitor
manufacturer’s ripple current ratings are often based on
only 2000 hours of life. This makes it advisable to further
derate the capacitor, or to choose a capacitor rated at a
higher temperature than required. Always consult the
manufacturer if there is any question. An additional 0.1µF
to 1µF ceramic capacitor is also required on Power VIN
(Pin 2) for high frequency decoupling.
The selection of COUT is driven by the required ESR. The
ESR of COUT must be less than twice the value of RSENSE
for proper operation of the LTC1266 series:
COUT Required ESR < 2RSENSE
Optimum efficiency is obtained by making the ESR equal
to RSENSE. As the ESR is increased up to 2RSENSE, the
efficiency degrades by less than 1%. If the ESR is greater
than 2RSENSE, the voltage ripple on the output capacitor
will prematurely trigger Burst Modeoperation, resulting in
disruption of continuous mode and an efficiency hit which
can be several percent. If Burst Mode operation is dis-
abled, the ESR requirement can be relaxed and is limited
only by the allowable output voltage ripple.
Manufacturers such as Nichicon and United Chemicon
should be considered for high performance capacitors.
The OS-CON semiconductor dielectric capacitor available
from Sanyo has the lowest ESR/size ratio of any aluminum
electrolytic at a somewhat higher price. Once the ESR
requirement for COUT has been met, the RMS current
rating generally far exceeds the IRIPPLE(P-P) requirement.
In surface mount applications multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
current handling requirements of the application. An
excellent choice is the AVX TPS series of surface mount
tantalums.
At low supply voltages, a minimum capacitance at COUT
is needed to prevent an abnormal low frequency oper-
ating mode (see Figure 4). When COUT is made too
small, the output ripple at low frequencies will be large
enough to trip the voltage comparator. This causes
Burst Modeoperation to be activated when the LTC1266
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LTC1266-3.3.PDF ] | |
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