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PDF LTC1264CS Data sheet ( Hoja de datos )

Número de pieza LTC1264CS
Descripción High Speed/ Quad Universal Filter Building Block
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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No Preview Available ! LTC1264CS Hoja de datos, Descripción, Manual

LTC1264
High Speed, Quad Universal
Filter Building Block
FEATURES
s High Speed, Up to 250kHz Center Frequency
s Four Identical Filters in a 0.3" Wide Package
s Clock-to-Center Frequency Ratio of 20:1
s Double-Sampling, Improved Aliasing
s Operates from ±2.37V to ±8V Power Supplies
s Customized Version with Internal Resistors Available
s Low Noise
s Low Harmonic Distortion
APPLICATI S
s Digital Communications
s Spread Spectrum Communications
s Spectral Analysis
s Loran Receivers
s Instrumentation
, LTC and LT are registered trademarks of Linear Technology Corporation.
DESCRIPTIO
The LTC®1264 consists of four identical, high speed 2nd
order switched-capacitor filter building blocks designed
for center frequencies up to 250kHz. Each building block,
together with three to five resistors, can provide 2nd order
functions like lowpass, highpass, bandpass and notch.
The center frequency of each 2nd order section is tuned via
an external clock. The clock-to-center frequency ratio is
internally set to 20:1, but it can be modified via external
resistors.
The aliasing performance of the LTC1264 is improved by
double-sampling each 2nd order section. Input signal
frequencies can reach up to twice the clock frequency
before any alias products will be detectable.
For Q 5 and for TA < 85°C, the maximum center
frequency is 160kHz. For Q 2, the maximum center
frequency is 250kHz. Up to 8th order filters can be realized
by cascading all four 2nd order sections.
A customized monolithic version of the LTC1264 includ-
ing internal thin film resistors can be obtained.
TYPICAL APPLICATI
Clock-Tunable 8th Order Bandpass Filter, fCENTER = fCLK/20
50k
50k
IN
10k
50k
MAXIMUM POWER
fCENTER SUPPLY
160kHz ±7.5V
120kHz ±5V
60kHz Single 5V
0.1µF
INV B
INV C
HPB/NB HPC/NC
BPB BPC
LPB LPC
SB
LTC1264
AGND
SC
V
V+ CLK
SA SD
10k
50k
0.1µF
fCLK
LPA LPD
50k
BPA
10k
BPD
50k
HPA/NA HPD/ND
10k
INV A
INV D
OUT
50k
50k
1264 TA01
Gain vs Frequency
100kHz Bandpass, f–3dB Bandwidth = fCENTER/10
10
0
–10
–20
–30
–40
–50
–60
–70
–80
10k
100k
FREQUENCY (Hz)
1M
1264 TA02
1

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LTC1264CS pdf
LTC1264
PI FU CTIO S
V +, V (Pins 7, 19): Power Supply Pins. The V+ (Pin 7) and
the V (Pin 19) should each be bypassed with a 0.1µF
capacitor to an adequate analog ground. The filter’s power
supplies should be isolated from other digital or high
voltage analog supplies. A low noise linear supply is
recommended. Using a switching power supply will lower
the signal-to-noise ratio of the filter. The supply during
power-up should have a slew rate less than 1V/µs. When
V + is applied before V and V is allowed to go above
ground, a diode should clamp V to prevent latch-up.
Figures 1 and 2 show typical connections for dual and
single supply operation.
AGND (Pin 6): Analog Ground Pin. The filter performance
depends on the quality of the analog signal ground. For
either dual or single supply operation, an analog ground
plane surrounding the package is recommended. The
analog ground plane should be connected to any digital
ground at a single point. For dual supply operation, Pin 6
should be connected to the analog ground plane. For
single supply operation, Pin 6 should be biased at 1/2
supply and should be bypassed to the analog ground plane
with at least a 1µF capacitor (Figure 2). For single 5V
operation and fCLK greater than 1MHz, pin 6 should be
biased at 2V. This minimizes passband gain and phase
variations.
ANALOG
GROUND
PLANE
7.5V
0.1µF
1 24
2 23
3 22
–7.5V
4 21 *
5 20
0.1µF
6 19
7 LTC1264 18
8 17
9 16
10 15
11 14
12 13
STAR
SYSTEM
GROUND
DIGITAL
GROUND
PLANE
200
CLOCK
SOURCE
* OPTIONAL, 1N4148, 1N5819
1264 F01
Figure 1. Dual Supply Ground Plane Connections
ANALOG
GROUND
PLANE
1
2
3
V+ 5k
4
*5
V+/2 6
1µF
+
5k
V+ 7
*8
9
10
11
12
LTC1264
24
23
22
21
20*
19
18
17*
16
15
14
13
STAR
SYSTEM
GROUND
DIGITAL
GROUND
PLANE
* FOR MODE 3, THE S NODE PINS 5, 8,
17, 20 SHOULD BE TIED TO PIN 6
200
CLOCK
SOURCE
1264 F02
Figure 2. Single Supply Ground Plane Connections
5

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LTC1264CS arduino
LTC1264
APPLICATI S I FOR ATIO
For example, for an LTC1264 bandpass filter with fCENTER
= 100kHz and fCLK = 2MHz, a 3.9MHz, 10mV input will
produce a 100kHz, 10mV output. A 1st or 2nd order
prefilter will reduce aliasing to acceptable levels in most
cases.
A GUIDE TO BANDPASS DESIGN
Filter design tools like FCAD require design specification
inputs such as passband ripple, attenuation, passband
width and stopband width in order to calculate filter
parameters fO, Q, fn or poles and zeroes. The results of
these filter approximations most often require Q values
which make excessive demands on the gain-bandwidth
products of active filter realizations. The active filter de-
signer should define a gain response so that the filter’s
mathematical approximation has practical requirements.
Table 4 is a guide to practical design specifications for
realizing bandpass filters with LTC1264 (please also refer
to the Typical Maximum Q vs Clock Frequency and Band-
pass Gain Error graphs under Typical Performance Char-
acteristics).
A Bandpass Design Example
Filter Type:
Filter Response:
Passband Ripple:
Attenuation:
Center Frequency:
Passband Width:
Stopband Width:
Bandpass
Butterworth
3dB
60dB
40kHz (fCENTER)
10kHz
60kHz
Implementing the Bandpass Design
With the LTC1264 in Mode 1b, Butterworth and Chebyshev
bandpass designs with fCLK to fCENTER ratios greater than
20:1 are possible.
First choose the clock frequency which in Mode 1b must
be greater than 20 times the bandpass center frequency of
40kHz. For this example, let’s choose fCLK to be 1MHz.
Table 6 lists the resistors for for the bandpass design
example and Figure 11 shows the complete circuit.
Table 4. Bandpass Design Specifications (fCENTER is center
frequency of passband.)
PASSBAND
RIPPLE
(dB)
PASSBAND
WIDTH
(Hz)
STOPBAND
WIDTH
(Hz)
ATTENU-
ATION
(dB)
3dB for Butterworth fCENTER/20 5 × Passband –40 to –60
0.1 for Chebyshev
fCENTER/20 5 × Passband –40 to –60
Note: Reducing passband ripple or attenuation will decrease Q values. The
filter order may also increase.
Table 5. Calculated Filter Parameters
STAGE
1
2
3
4
fO
38.1201kHz
41.9726kHz
35.6418kHz
44.8911kHz
Q
4.3346
4.3346
10.5221
10.5221
Table 6. Calculated Mode 1b Resistors to Nearest 1% Value
Using Table 5 Filter Parameters and Figure 10 Equations
STAGE R1 R2 R3 R5 R6
1 52.3k 10k 56.2k 5k 6.98k
2 47.5k 10k 51.1k 5k 11.8k
3 56.2k 10k 147k 5k 5.11k
4 44.2k 10k 118k 5k 20.5k
R2 = 10k
R5 = 5k
fi =
fCLK
20
R1 = R3 (FOR BANDPASS)
HOBP
( )R6 =
R5•fO2
fi2 – fO2
( ) ( )2
HOBP =
Q2
fO
fCENTER
fCENTER
fO
+1
R3 = R2•Q
R6
(R6 + 5)
1264 F10
Figure 10. Equations for Resistors in Mode 1b Operation
11

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