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PDF RS5C313 Data sheet ( Hoja de datos )
| Número de pieza | RS5C313 | |
| Descripción | ULTRA-COMPACT REAL-TIME CLOCK IC | |
| Fabricantes | RICOH electronics devices division | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de RS5C313 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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ULTRA-COMPACT
REAL-TIME CLOCK IC
RS5C313
APPLICATION MANUAL
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ELECTRONIC DEVICES DIVISION
NO.EA-034-9908
1 page  
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RS5C313
BLOCK DIAGRAM
OSCIN
OSCOUT
OSC DIV SEC.
VDD
OSC
DETECT
VOLTAGE
REGULATOR
VSS
ADDRESS
DECODER
MIN. HOUR WEEK DAY MONTH YEAR
TIME COUNTER
ADDRESS
REGISTER
I/O
CONTROL
SCLK
SIO
INTR
INTERRUPT
CONTROL
SHIFT REGISTER
CE
et4U.com APPLICATIONS
• Communication equipment (Multi-function telephone, portable telephone, PHS, Pager)
• Office automation (Facsimile, portable facsimile) DataSheet4U.com
• Personal computer (Desk top type, notebook type, word proccesor, PDA, electronic notebook, TV games)
• Audio visual equipment (Portable audio equipment, video camera, camera, digital camera, remote control equip-
ment)
• Home use (Rice cooker, microwave range)
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PIN CONFIGURATION
• 8pin SSOP
CE
SCLK
SIO
VSS
1
2
3
4
8 VDD
7 OSCIN
6 OSCOUT
5 INTR
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RS5C313
2. Register
2.1 Control Register (at Eh)
D3 D2 D1 D0
CTFG 12/24 WTEN ADJ
CTFG 12/24 XSTP BSY
(For write operation)
(For read operation)
±30-second Adjustment Bit
ADJ
Description
0 Ordinary operation
1 Second digit adjustment
Clock/Calendar Counter Busy-state Indication Bit
BSY
Description
0 Ordinary operation
1 Second digit carry or adjustment
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Clock Counter Enable/Disable Setting Bit
WTEN
Description
0 Disabling of 1-second digit carry for clock counter
1 DEantaaSblhinegeot4f 1U-s.cecoomnd digit carry for clock counter
Oscillator Halt Sensing Bit
XSTP
Description
0 Ordinary oscillation
1 Oscillator halt sensing
12/24-hour Time Display System Selection Bit
12/24
0
1
Description
12-hour time display system (separate for mornings and afternoons)
24-hour time display system
Interrupt Flag Bit
CTFG
Description
0 INTR=H(Nch Open Drain). Enabling of write operation when the CT3 bit is set to 1.
1 INTR=L (Nch Open Drain). Enabling of write operation when the CT3 bit is set to 1.
2.1-1 (ADJ)
When the ADJ bit is set to 1: (If the WTEN bit is 0, adjustment of second digits is started after the WTEN bit is set to 1.)
1) For second digits ranging from 00 to 29 seconds: Time counts smaller than seconds are reset to set second digits to “00”.
2) For second digits ranging from 30 to 59 seconds: Time counts smaller than seconds are reset to set second digits to “00”
and increment minute digits by 1. After the ADJ bit is set to 1, the BSY
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bit is set to 1 for the maximum duration of 122.1µs.
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| PDF Descargar | [ Datasheet RS5C313.PDF ] | |
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