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PDF LTC1257IS8 Data sheet ( Hoja de datos )
| Número de pieza | LTC1257IS8 | |
| Descripción | Complete Single Supply 12-Bit Voltage Output DAC in SO-8 | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC1257
Complete Single Supply
12-Bit Voltage Output
DAC in SO-8
FEATURES
s 8-Pin SO Package
s Buffered Voltage Output
s Built-In 2.048V Reference
s 500µV/LSB with 2.048V Full Scale
s 1/2LSB Max DNL Error
s Guaranteed 12-Bit Monotonic
s 3-Wire Cascadable Serial Interface
s Wide Single Supply Range: VCC = 4.75V to 15.75V
s Low Power: ICC Typ = 350µA with 5V Supply
APPLICATI S
s Digital Offset/Gain Adjustment
s Industrial Process Control
s Automatic Test Equipment
DESCRIPTIO
The LTC®1257 is a complete single supply, 12-bit voltage
output D/A converter (DAC) in an SO-8 package. The
LTC1257 includes an output buffer amplifier, 2.048V
voltage reference and an easy to use three-wire cascadable
serial interface. An external reference can be used to
override the internal reference and extend the output
voltage range to 12V. The power supply current is a low
350µA when operating from a 5V supply, making the
LTC1257 ideal for battery-powered applications. The space-
saving 8-pin SO package and operation with no external
components provide the smallest 12-bit D/A system
available.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATI
Daisy-Chained Control Outputs
5V
0.1µF
CONTROL OUTPUT 1
VOUT
VCC DIN
CLK
LTC1257
LOAD
GND VREF DOUT
µP
0.1µF
CONTROL OUTPUT 2
VOUT
VCC DIN
CLK
LTC1257
LOAD
GND VREF DOUT
TO NEXT DAC
1257 TA01
Differential Nonlinearity
vs Input Code
0.5
0.0
–0.5
0 512 1024 1536 2048 2560 3072 3584 4098
CODE
1257 TA05
1
1 page  
TYPICAL PERFORMANCE CHARACTERISTICS
Differential Nonlinearity (DNL)
0.5
0.0
–0.5
0 512 1024 1536 2048 2560 3072 3584 4098
CODE
1257 TA05
Reference Compensation
Resistance vs CL
70
60
50
40
30
20
10
0
0.01
0.1 1
CL (µF)
10 100
1257 G11
LTC1257
Broadband Noise
CODE = FFFH
BW = 3Hz TO 1MHz
GAIN = 1100×
TIME = 5ms/DIV
1257 G12
PI FU CTIO S
CLK (Pin 1): The TTL level input for the serial interface
clock.
DIN (Pin 2): The TTL level input for the serial interface data.
Data on the DIN pin is latched into the shift register on the
rising edge of the serial clock.
LOAD (Pin 3): The TTL level input for the serial interface
load control. Data is loaded from the shift register into the
DAC register, thus updating the DAC output when LOAD is
pulled low. The DAC register is transparent as long as
LOAD is held low.
DOUT(Pin 4): The output of the shift register which
becomes valid on the rising edge of the serial clock. The
DOUT pin is driven from GND to VCC by an internal CMOS
inverter. Multiple LTC1257s may be cascaded by connect-
ing the DOUT pin to the DIN pin of the next chip.
GND (Pin 5): Ground.
REF (Pin 6): The output of the 2.048V reference and the
input to the DAC resistor ladder. An external reference with
voltage from 2.475V to VCC – 2.7V may be used to override
the internal reference.
VOUT (Pin 7): The buffered DAC output is capable of
sourcing 2mA over temperature while pulling within 2.7V
of VCC. The output will pull to ground through an internal
200Ω equivalent resistance.
VCC (Pin 8): The positive supply input. 4.75V ≤ VCC ≤
15.75V. Requires a bypass capacitor to ground.
5
5 Page 
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
LTC1257
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8 765
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157**
(3.810 – 3.988)
0.010
(0.254
–
–
0.020
0.508)
×
45°
0.008 – 0.010
(0.203 – 0.254)
1
0°– 8° TYP
0.053 – 0.069
(1.346 – 1.752)
2
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
34
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
SO8 0996
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LTC1257IS8.PDF ] | |
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