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PDF LTC1149-3.3 Data sheet ( Hoja de datos )
| Número de pieza | LTC1149-3.3 | |
| Descripción | High Efficiency Synchronous Step-Down Switching Regulators | |
| Fabricantes | Linear Technology | |
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LTC1149
LTC1149-3.3/LTC1149-5
High Efficiency Synchronous
Step-Down Switching Regulators
FEATURES
s Operation to 48V Input Voltage
s Ultrahigh Efficiency: Up to 95%
s Current Mode Operation for Excellent Line and
Load Transient Response
s High Efficiency Maintained over Wide Current Range
s Logic-Controlled Micropower Shutdown
s Short-Circuit Protection
s Very Low Dropout Operation: 100% Duty Cycle
s Synchronous FET Switching for High Efficiency
s Adaptive Nonoverlap Gate Drives
s Available in 16-Pin Narrow SO Package
APPLICATI S
s Notebook and Palmtop Computers
s Portable Instruments
s Battery-Operated Digital Devices
s Industrial Power Distribution
s Avionics Systems
s Telecom Power Supplies
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
DESCRIPTIO
The LTC®1149 series is a family of synchronous step-
down switching regulator controllers featuring automatic
Burst ModeTM operation to maintain high efficiencies at
low output currents. These devices drive external comple-
mentary power MOSFETs at switching frequencies up
to 250kHz using a constant off-time current-mode archi-
tecture.
Special onboard regulation and level-shift circuitry allow
operation at input voltages from dropout to 48V (60V
absolute max). The constant off-time architecture main-
tains constant ripple current in the inductor, easing the
design of wide input range converters. Current mode
operation provides excellent line and load transient
response. The operating current level is user-program-
mable via an external current sense resistor.
The LTC1149 series incorporates automatic power saving
Burst Mode operation when load currents drop below the
level required for continuous operation. Standby power is
reduced to only about 8mW at VIN = 12V. In shutdown,
both MOSFETs are turned off.
TYPICAL APPLICATI
VIN
1N4148
+
3.3µF
0.068µF
CAP
VCC
VCC
VIN
PGATE
PDRIVE
LTC1149-5
0V = NORMAL
>2V = SHUTDOWN
3300µF
1k
CT
470pF
SHDN1
SHDN2
ITH
CT
SGND
SENSE +
SENSE –
NGATE
P, RGNDS
1N4148
0.047µF
D1
1N5819
+
P-CHANNEL
IRFR9024
CIN
100µF
100V
L*
62µH
RSENSE**
0.05Ω
VOUT
5V/2A
1000pF
N-CHANNEL
IRFR024
+
COUT
220µF
*COILTRONICS CTX62-2-MP
**KRL SL-1-C1-0R050J
1149 F01
Figure 1. High Efficiency Step-Down Regulator
LTC1149-5 Efficiency
100
FIGURE 1 CIRCUIT
VIN = 12V
90
VIN = 24V
80
70
60
0.02
0.2
LOAD CURRENT (A)
2
1149 TA01
1
1 page  
LTC1149
LTC1149-3.3/LTC1149-5
PI FU CTIO S
PGATE (Pin 1): Level-Shifted Gate Drive Signal for Top
P-Channel MOSFET. The voltage swing at Pin 1 is from VIN
to VIN – VCC.
VIN (Pin 2): Main Supply Input Pin.
VCC (Pin 3): Output Pin of Low Dropout 10V Regulator. Pin
3 is not protected against DC short circuits.
PDRIVE (Pin 4): High Current Gate Drive for Top
P-Channel MOSFET. The voltage swing at Pin 4 is from VCC
to ground.
VCC (Pin 5): Regulated 10V Input for Driver and Control
Supplies. Must be closely decoupled to power ground.
CT (Pin 6): External capacitor CT from Pin 6 to ground sets
the operating frequency. (The frequency is also dependent
on the ratio VOUT/VIN.)
ITH (Pin 7): Gain Amplifier Decoupling Point. The current
comparator threshold increases with the Pin 7 voltage.
SENSE– (Pin 8): Connects to internal resistive divider
which sets the output voltage in LTC1149-3.3 and
LTC1149-5 versions. Pin 8 is also the (–) input for the
current comparator.
SENSE+ (Pin 9): The (+) Input for the Current Comparator.
A built-in offset between Pins 8 and 9 in conjunction with
RSENSE sets the current trip threshold.
U
OPERATIO (Refer to Functional Diagram)
The LTC1149 series uses a current mode, constant off-
time architecture to synchronously switch an external pair
of complementary power MOSFETs. Operating frequency
is set by an external capacitor at the timing capacitor,
Pin 6.
The output voltage is sensed either by an internal voltage
divider connected to SENSE–, Pin 8 (LTC1149-3.3 and
LTC1149-5) or an external divider returned to VFB Pin 10
(LTC1149). A voltage comparator V, and a gain block G,
compare the divided output voltage with a reference
voltage of 1.25V. To optimize efficiency, the LTC1149
series automatically switches between two modes of
operation, burst and continuous. The voltage comparator
is the primary control element for Burst Mode operation,
while the gain block controls the output voltage in continu-
ous mode.
SHDN1/VFB (Pin 10): In fixed output voltage versions, Pin
10 serves as a shutdown pin for the control circuitry only
(VCC is not affected). Taking Pin 10 of the LTC1149-3.3 or
LTC1149-5 high holds both MOSFETs off. Must be at
ground potential for normal operation.
For the LTC1149 adjustable version, Pin 10 serves as the
feedback pin from an external resistive divider used to set
the output voltage.
SGND (Pin 11): Small-Signal Ground. Must be routed
separately from other grounds to the (–) terminal of COUT.
PGND (Pin 12): Driver Power Ground. Connects to source
of N-channel MOSFET and the (–) terminal of CIN.
NGATE (Pin 13): High Current Drive for Bottom
N-channel MOSFET. The voltage swing at Pin 13 is from
ground to VCC.
RGND (Pin 14): Low Dropout Regulator Ground. Con-
nects to power ground.
SHDN2 (Pin 15): Master Shutdown Pin. Taking Pin 15
high shuts down VCC and all control circuitry; requires a
logic signal with tr, tf < 1µs.
CAP (Pin 16): Charge Compensation Pin. A capacitor from
Pin 16 to VCC provides the charge required by the P-drive
level-shift capacitor during supply transitions. The Pin 16
capacitor must be larger than the Pin 4 capacitor.
A low dropout 10V regulator provides the operating volt-
age VCC for the MOSFET drivers and control circuitry. The
driver outputs at Pins 4 and 13 are referenced to ground,
which fulfills the N-channel MOSFET gate drive require-
ment. The P-channel gate drive at Pin 1 must be refer-
enced to the main supply input VIN, which is accomplished
by level-shifting the Pin 4 signal via an internal 500k
resistor and external capacitor.
During the switch “ON” cycle in continuous mode, current
comparator C monitors the voltage between Pins 8 and 9
connected across an external shunt in series with the
inductor. When the voltage across the shunt reaches its
threshold value, the PGATE output is switched to VIN,
turning off the P-channel MOSFET. The timing capacitor
connected to Pin 6 is now allowed to discharge at a rate
determined by the off-time controller. The discharge
5
5 Page 
UU W U
APPLICATIO S I FOR ATIO
output ripple at low frequencies will be large enough to trip
the voltage comparator. This causes the Burst Mode
operation to be activated when the LTC1149 series would
normally be in continuous operation. The effect is most
pronounced with low values of RSENSE and can be
improved by operating at higher frequencies with lower
values of L. The output remains in regulation at all times.
Checking Transient Response
Switching regulators take several cycles to respond to a
step in DC (resistive) load current. When a load step
occurs, VOUT shifts by an amount equal to (∆ILOAD)(ESR),
where ESR is the effective series resistance of COUT.
∆ILOAD also begins to charge or discharge COUT until the
1000
800
L = 50µH
RSENSE = 0.02Ω
600
L = 25µH
RSENSE = 0.02Ω
400
L = 50µH
RSENSE = 0.05Ω
200
0
01 2 345
(VIN – VOUT) VOLTAGE (V)
1149 F04
Figure 4. Minimum Suggested COUT
LTC1149
LTC1149-3.3/LTC1149-5
regulator loop adapts to the current change and returns
VOUT to its steady state value. During this recovery time
VOUT can be monitored for overshoot or ringing which
would indicate a stability problem. The Pin 7 external
components shown in the Figure 1 circuit will prove
adequate compensation for most applications.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25)(CLOAD).
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
LTC1149 Adjustable Applications
When an output voltage other than 3.3V or 5V is required,
the LTC1149 adjustable version is used with an external
resistive divider from VOUT to VFB Pin 10. The regulated
voltage is determined:
) )VOUT = 1.25
1+
R2
R1
In applications where VOUT is greater than the LTC1149
internally regulated VCC voltage, RSENSE must be moved to
1N4148
+
1µF
0.068µF
0V = NORMAL
>2V = SHUTDOWN
VIN
CAP PGATE
VCC
VCC PDRIVE
NGATE
LTC1149
SHDN2
VFB
3300pF
1k
ITH
CT
CT
200pF
SENSE +
SENSE –
GNDS
VIN
1N4148
0.047µF
IRF9Z34
IRFZ34
+ 150µF
50V
100µH
1N5819
100pF
1000pF
( )VOUT =
1.25
1+
R2
R1
VALUES SHOWN FOR VOUT = 12V
R2
215k
1%
+
R1
25k
1%
150µF
16V
OS-CON
RSENSE
0.05Ω
VOUT LOAD
OUTPUT
GROUND
CONNECTION
1149 F05
Figure 5. High Efficiency Step-Down Regulator with VOUT > VCC
11
11 Page | ||
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| PDF Descargar | [ Datasheet LTC1149-3.3.PDF ] | |
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