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PDF PSMN005-25D Data sheet ( Hoja de datos )

Número de pieza PSMN005-25D
Descripción N-channel logic level TrenchMOS transistor
Fabricantes Philips 
Logotipo Philips Logotipo



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Philips Semiconductors
Product specification
N-channel logic level TrenchMOStransistor
PSMN005-25D
FEATURES
’Trench’ technology
• Very low on-state resistance
• Fast switching
• Logic level compatible
SYMBOL
d
g
s
QUICK REFERENCE DATA
VDSS = 25 V
ID = 75 A
RDS(ON) 5.8 m(VGS = 10 V)
RDS(ON) 7.5 m(VGS = 5 V)
GENERAL DESCRIPTION
SiliconMAX products use the latest
Philips Trench technology to
achieve the lowest possible
on-state resistance in each
package at each voltage rating.
Applications:-
• d.c. to d.c. converters
• switched mode power supplies
The PSMN005-25D is supplied in
the SOT428 (Dpak) surface
mounting package.
PINNING
PIN
DESCRIPTION
1 gate
2 drain1
3 source
tab drain
SOT428 (DPAK)
tab
2
13
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
VGSM
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Continuous gate-source
voltage
Peak pulsed gate-source
voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 175˚C
Tj = 25 ˚C to 175˚C; RGS = 20 k
Tj 150 ˚C
Tmb = 25 ˚C; VGS = 5 V
Tmb = 100 ˚C; VGS = 5 V
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
25
25
± 15
± 20
752
70
240
125
175
UNIT
V
V
V
V
A
A
A
W
˚C
1 It is not possible to make connection to pin 2 of the SOT428 package.
2 Continuous current rating limited by package.
October 1999
1
Rev 1.100

1 page




PSMN005-25D pdf
Philips Semiconductors
N-channel logic level TrenchMOStransistor
Product specification
PSMN005-25D
Drain current, ID (A)
50
45 VDS > ID X RDS(ON)
40
35
30
25
20
15 175 C
10
Tj = 25 C
5
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3
Gate-source voltage, VGS (V)
Fig.7. Typical transfer characteristics.
ID = f(VGS)
Transconductance, gfs (S)
80
75 VDS > ID X RDS(ON)
70
65
60
55
50
45
40
35
30
25
20
15
10
5
Tj = 25 C
0
0 5 10 15 20 25 30 35 40
Drain current, ID (A)
175 C
45
50
Fig.8. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID)
Normalised On-state Resistance
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
Junction temperature, Tj (C)
Fig.9. Normalised drain-source on-state resistance.
RDS(ON)/RDS(ON)25 ˚C = f(Tj)
Threshold Voltage, VGS(TO) (V)
2.25
2
1.75
maximum
1.5
typical
1.25
1
0.75
0.5
minimum
0.25
0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
Junction Temperature, Tj (C)
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
Drain current, ID (A)
1.0E-01
VDS = 5 V
1.0E-02
1.0E-03
1.0E-04
minimum
typical
maximum
1.0E-05
1.0E-06
0 0.5 1 1.5 2 2.5 3
Gate-source voltage, VGS (V)
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
Capacitances, Ciss, Coss, Crss (pF)
10000
1000
Ciss
Coss
Crss
100
0.1
1 10
Drain-Source Voltage, VDS (V)
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
October 1999
5
Rev 1.100

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