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PDF NDS331N Data sheet ( Hoja de datos )
| Número de pieza | NDS331N | |
| Descripción | N-Channel Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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July 1996
NDS331N
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features
These N-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage
applications in notebook computers, portable phones, PCMCIA
cards, and other battery powered circuits where fast
switching, and low in-line power loss are needed in a very
small outline surface mount package.
1.3 A, 20 V. RDS(ON) = 0.21 Ω @ VGS= 2.7 V
RDS(ON) = 0.16 Ω @ VGS= 4.5 V.
Industry standard outline SOT-23 surface mount package
using poprietary SuperSOTTM-3 design for superior thermal
and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
_______________________________________________________________________________
D
Absolute Maximum Ratings
Symbol Parameter
TA = 25°C unless otherwise noted
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage - Continuous
ID Maximum Drain Current - Continuous
- Pulsed
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
GS
NDS331N
20
8
1.3
10
0.5
0.46
-55 to 150
250
75
© 1997 Fairchild Semiconductor Corporation
Units
V
V
A
W
°C
°C/W
°C/W
NDS331N Rev.E
1 page  
Typical Electrical Characteristics (continued)
1.12
I D = 250µA
1.08
1.04
1
0.96
0.92
-50 -25 0 25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
1
VGS = 0V
0.1
0.01
0.001
TJ = 125°C
25°C
-55°C
0.0001
0
0.2 0.4 0.6 0.8
1
V , BODY DIODE FORWARD VOLTAGE (V)
SD
1.2
Figure 8. Body Diode Forward Voltage Variation with
Source Current and Temperature.
600
400
200 Ciss
100 Coss
50
f = 1 MHz
20 VGS = 0V
C rss
10
0.1
0.2
0.5 1
2
5 10
V , DRAIN TO SOURCE VOLTAGE (V)
DS
20
Figure 9. Capacitance Characteristics.
5
ID = 1.3A
4
3
2
1
0
01
VDS = 5V
15V
10V
23
Q g , GATE CHARGE (nC)
4
5
Figure 10. Gate Charge Characteristics.
VIN
VGS
RGEN
G
VDD
RL
D
VOUT
DUT
S
Figure 11. Switching Test Circuit.
t d(on)
t on
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE WIDTH
Figure 12. Switching Waveforms.
NDS331N Rev.E
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NDS331N.PDF ] | |
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