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PDF NTE3880 Data sheet ( Hoja de datos )

Número de pieza NTE3880
Descripción Integrated Circuit NMOS / 8-Bit Microprocessor (MPU) / 4MHz
Fabricantes NTE 
Logotipo NTE Logotipo



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No Preview Available ! NTE3880 Hoja de datos, Descripción, Manual

NTE3880
Integrated Circuit
NMOS, 8–Bit Microprocessor (MPU), 4MHz
Description:
The NTE3880 is a third generation single chip microprocessor with unrivaled computational power.
This increased computational power results in higher system through–put and more efficient memory
utilization when compared to second generation microprocessors. In addition it is very easy to imple-
ment into a system because of it’s single voltage requirement plus all output signals are fully decoded
and timed to control standard memory or peripheral circuits. The circuit is implemented using an N–
channel, ion implanted, silicon gate MOS process.
This device has an internal register configuration which contains 208 bits of Read/Write memory that
are accessible to the programmer. The registers include two sets of six general purpose registers that
may be used individually as 8–bit registers or as 16–bit register pairs. There are also two sets of accu-
mulator and flag registers. The programmer has access to either set of main or alternate registers
through a group of exchange instructions. This alternate set allows foreground/background mode of
operation or may be reserved for very fast interrupt response. The NTE3880 also contains a 16–bit
stack pointer which permits simple implementation of multiple level interrupts, unlimited subroutine
nesting and simplification of many types of data handling.
The two 16–bit index registers allow tabular data manipulation and easy implementation of relocat-
able code. The Refresh register provides for automatic, totally transparent refresh of external dynam-
ic memories. The I register is used in a powerful interrupt response mode to form the upper 8 bits of
a pointer to a interrupt service address table, while the interrupting device supplies the lower 8 bits
of the pointer. An indirect call is then made to this service address.
Features:
D Single Chip, N–Channel Silicon Gate
D 158 Instructions – Includes all 78 of the 8080A Instructions with Total Software Compatibility. New
Instructions Include 4–, 8– and 16–Bit Operations with more useful Addressing Modes such as
Indexed, Bit and Relative
D 17 Internal Registers
D Three Modes of Fast Interrupt Response plus a Non–Maskable Interrupt
D Directly Interfaces Standard Speed Static or Dynamic Memories with Virtually No External Logic
D 1.0µs Instruction Execution Speed
D Single 5VDC Supply and Single–Phase 5V Clock
D Out–Performs any other Single–Phase 5V Clock
D All Pins TTL Compatible
D Built–In Dynamic RAM Refresh Circuitry

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NTE3880 pdf
40 21
1 20
2.055 (52.2)
.550 (13.9)
Max
.155 (3.9)
.100 (2.54)
.019 (0.5)
.137
(3.5)
.650 (16.5)

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