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PDF MM74HC76 Data sheet ( Hoja de datos )
| Número de pieza | MM74HC76 | |
| Descripción | Dual J-K Flip-Flops with Preset and Clear | |
| Fabricantes | National | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MM74HC76 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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January 1988
MM54HC76 MM74HC76 Dual J-K Flip-Flops
with Preset and Clear
General Description
These high speed (30 MHz minimum) J-K Flip-Flops utilize
advanced silicon-gate CMOS technology to achieve the low
power consumption and high noise immunity of standard
CMOS integrated circuits along with the ability to drive 10
LS-TTL loads
Each flip-flop has independent J K PRESET CLEAR and
CLOCK inputs and Q and Q outputs These devices are
edge sensitive to the clock input and change state on the
negative going transition of the clock pulse Clear and pre-
set are independent of the clock and accomplished by a low
logic level on the corresponding input
The 54HC 74HC logic family is functionally as well as pin-
out compatible with the standard 54LS 74LS logic family
All inputs are protected from damage due to static dis-
charge by internal diode clamps to VCC and ground
Features
Y Typical propagation delay 16 ns
Y Wide operating voltage range
Y Low input current 1 mA maximum
Y Low quiescent current 40 mA maximum (74HC Series)
Y High output drive 10 LS-TTL loads
Connection and Logic Diagrams
Truth Table
Dual-In-Line Package
Inputs
Outputs
PR CLR CLK J L Q Q
LH
X XX H L
HL
X XX L H
LL
X XXL L
vH H
L L Q0 Q0
H H v HL H L
H H v LH L H
vH H
H H TOGGLE
HH
H X X Q0 Q0
This is an unstable condition and is not guaranteed
Top View
TL F 5074 – 1
Order Number MM54HC76 or MM74HC76
(1 of 2)
C1995 National Semiconductor Corporation TL F 5074
TL F 5074 – 2
TL F 5074 – 3
RRD-B30M105 Printed in U S A
1 page  
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54HC76J or MM74HC76J
NS Package Number J16A
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet MM74HC76.PDF ] | |
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