PDF MM74HC597M Data sheet ( Hoja de datos )

Número de pieza	MM74HC597M
Descripción	8-Bit Shift Registers with Input Latches
Fabricantes	Fairchild
Logotipo
Hay una vista previa y un enlace de descarga de MM74HC597M (archivo pdf) en la parte inferior de esta página. Total 8 Páginas
No Preview Available ! January 1988 Revised August 2000 MM74HC597 8-Bit Shift Registers with Input Latches General Description This high speed register utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 10 LS-TTL loads. The MM74HC597 comes in a 16-pin package and consists of an 8-bit storage latch feeding a parallel-in, serial-out 8-bit shift register. Both the storage register and shift regis- ter have positive-edge triggered clocks. the shift register also has direct load (from storage) and clear inputs. The 74HC logic family is speed, function, and pin-out com- patible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. Features s 8-bit parallel storage register inputs s Wide operating voltage range: 2V–6V s Shift register has direct overriding load and clear s Guaranteed shift frequency: DC to 30 MHz s Low quiescent current: 80 µA maximum Ordering Code: Order Number Package Number Package Description MM74HC597M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow MM74HC597SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC597N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table Top View RCK SCK SLOAD SCLR Function ↑X X X Data Loaded to input latches ↑X L Data loaded from inputs to H shift register No Data transferred from clock X L H input latches to shift edge register Invalid logic, state of XX L L shift register indeterminate when signals removed XX H L Shift register cleared X↑ H Shift register clocked H Qn = Qn−1, Q0 = SER © 2000 Fairchild Semiconductor Corporation DS005343 www.fairchildsemi.com 1 page AC Electrical Characteristics (Continued) Symbol Parameter Conditions VCC TA = 25°C Typ TA=−40 to 85°C TA=−55 to 125°C Units Guaranteed Limits tS Minimum Setup Time from Inputs A thru H 2.0V 4.5V 100 125 20 25 150 30 ns to RCK 6.0V 17 21 25 tH Minimum Hold Time 2.0V 4.5V 00 00 0 0 ns 6.0V 00 0 tW Minimum Pulse Width SCK, RCK, SCLR, SLOAD 2.0V 4.5V 30 9 80 16 100 20 120 24 ns 6.0V 8 14 18 20 tr, tf Maximum Input Rise and Fall Time 2.0V 4.5V 1000 500 1000 500 1000 500 ns 6.0V 400 400 400 tTHL, tTLH Maximum Output Rise and Fall Time 2.0V 4.5V 30 10 75 15 95 19 110 22 ns 6.0V 8 13 16 19 tTHL, tTLH Maximum Output Rise and Fall Time 2.0V 4.5V 75 95 15 19 110 ns 22 ns 6.0V 13 16 19 ns CPD Power Dissipation Capacitance, Outputs (Note 6) 87 pF CIN Maximum Input Capacitance 5 10 10 10 pF COUT Maximum Output Capacitance 15 20 20 20 pF Note 6: CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. 5 www.fairchildsemi.com 5 Page

Páginas	Total 8 Páginas
PDF Descargar	[ Datasheet MM74HC597M.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
MM74HC597	8-Bit Shift Registers with Input Latches	Fairchild
MM74HC597M	8-Bit Shift Registers with Input Latches	Fairchild
MM74HC597N	8-Bit Shift Registers with Input Latches	Fairchild
MM74HC597SJ	8-Bit Shift Registers with Input Latches	Fairchild

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar