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PDF MM74HC595 Data sheet ( Hoja de datos )
| Número de pieza | MM74HC595 | |
| Descripción | 8-Bit Shift Registers with Output Latches | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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June 2009
MM74HC595
8-Bit Shift Register with Output Latches
Features
Low Quiescent current: 80µA Maximum
(74HC Series)
Low Input Current: 1µA Maximum
8-Bit Serial-In, Parallel-Out Shift Register with
Storage
Wide Operating Voltage Range: 2V–6V
Cascadable
Shift Register has Direct Clear
Guaranteed Shift Frequency: DC to 30MHz
Description
The MM74HC595 high-speed shift register utilizes
advanced silicon-gate CMOS technology. This device
possesses the high noise immunity and low power
consumption of standard CMOS integrated circuits, as
well as the ability to drive 15 LS-TTL loads.
This device contains an eight-bit serial-in, parallel-out,
shift register that feeds an eight-bit D-type storage
register. The storage register has eight 3-state outputs.
Separate clocks are provided for both the shift register
and the storage register. The shift register has a direct-
overriding clear, serial input, and serial output
(standard) pins for cascading. Both the shift register
and storage register use positive-edge triggered clocks.
If both clocks are connected together, the shift register
state is one clock pulse ahead of the storage register.
The 74HC logic family is speed, function, and pin-out
compatible with the standard 74LS logic family. All
inputs are protected from damage due to static
discharge by internal diode clamps to VCC and ground.
Ordering Information
Part Number
MM74HC595M
MM74HC595MX
MM74HC595SJ
MM74HC595SJX
MM74HC595MTC
MM74HC595MTCX
Operating
Temperature
Range
-40 to +85°C
-40 to +85°C
-40 to +85°C
-40 to +85°C
-40 to +85°C
-40 to +85°C
MM74HC595N
-40 to +85°C
Eco
Status
Package
Packing
Method
RoHS
RoHS
RoHS
RoHS
RoHS
RoHS
RoHS
16-Lead, Small Outline Integrated Circuit (SOIC),
Tubes
JEDEC MS-012, 0.150 Inch Narrow
Tape and Reel
16-Lead, Small Outline Package (SOP), EIAJ
TYPE II, 5.3mm Wide
Tubes
Tape and Reel
16-Lead, Thin Shrink Small Outline Package
(TSSOP), JEDEC MO-153, 4.4mm Wide
Tubes
Tape and Reel
16-Lead, Plastic Dual In-Line Package (PDIP),
JEDEC MS-001, 0.300 Inch Wide
Tubes
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 1983 Fairchild Semiconductor Corporation
MM74HC595 • Rev. 1.0.2
www.fairchildsemi.com
1 page  
Electrical Characteristics(3)
Symbol Parameter
Conditions
VCC
TA=25°C
TA=-40 to TA=-55
85°C to 125°C Units
Typ.
Guaranteed Limits
Minimum HIGH
VIH Level Input
Voltage
2.0V
4.5V
6.0V
1.50
3.15
4.20
Minimum LOW
VIL Level Input
Voltage
2.0V
4.5V
6.0V
0.50
1.35
1.80
Minimum HIGH
Level Output
Voltage
VIN=VIH or VIL ⏐IOUT⏐≤20µA
2.0V
4.5V
6.0V
2.00 1.90
4.50 4.40
6.00 5.90
VOH
Q’H
VIN=VIH or VIL
⏐IOUT⏐≤4.0mA
⏐IOUT⏐≤5.2mA
4.5V
6.0V
4.20 3.98
5.20 5.48
QA through QH
VIN=VIH or VIL
⏐IOUT⏐≤6.0mA
⏐IOUT⏐≤7.8mA
4.5V
6.0V
4.20 3.98
5.70 5.48
Minimum LOW
2.0V
0 0.10
Level Output VIN=VIH or VIL ⏐IOUT⏐≤20µA
4.5V
0
0.10
Voltage
6.0V
0 0.10
VOL Q’H
VIN=VIH or VIL
⏐IOUT⏐≤4.0mA
⏐IOUT⏐≤5.2mA
4.5V
6.0V
0.20 0.26
0.20 0.26
QA through QH
VIN=VIH or VIL
⏐IOUT⏐≤6.0mA
⏐IOUT⏐≤7.8mA
4.5V
6.0V
0.20 0.26
0.20 0.26
Maximum Input
IIN Output
VIN=VCC or GND
Leakage
6.0V
±0.1
IOZ
Maximum 3-
State Output
Leakage
VOUT =VCC
or GND
G=VIH
6.0V
±0.5
Maximum
VIN =VCC
ICC Quiescent
or GND
Supply Current
IOUT=µA
6.0V
8.0
1.50
3.15
4.20
0.50
1.35
1.80
1.90
4.40
5.90
3.84
5.34
3.84
5.34
0.10
0.10
0.10
0.33
0.33
0.33
0.33
±1.0
±5.0
80
1.50
3.15 V
4.20
0.50
1.35 V
1.80
1.90
4.40 V
5.90
3.70
V
5.20
3.70
V
5.20
0.10
0.10 V
0.10
0.40
V
0.40
0.40
V
0.40
±1.0 µA
±10 µA
160 µA
Note:
3. For a power supply of 5V ±10%, the worst-case output voltages (VOH, and VOL) occur for HC at 4.5V. The 4.5V
values should be used when designing with this supply. Worst-case VIH and VIL occur at VCC = 5.5V and 4.5V,
respectively; VIH value at 5.5V is 3.85V. The worst-case leakage current (IIN, ICC, and IOZ) occurs for CMOS at
the higher voltage; so the 6.0V values should be used.
© 1983 Fairchild Semiconductor Corporation
MM74HC595 • Rev. 1.0.2
5
www.fairchildsemi.com
5 Page 
Physical Dimensions
Figure 5. 16-Lead, Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 1983 Fairchild Semiconductor Corporation
MM74HC595 • Rev. 1.0.2
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet MM74HC595.PDF ] | |
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