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PDF MM74HC245AWM Data sheet ( Hoja de datos )
| Número de pieza | MM74HC245AWM | |
| Descripción | Octal 3-STATE Transceiver | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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September 1983
Revised February 1999
MM74HC245A
Octal 3-STATE Transceiver
General Description
The MM74HC245A 3-STATE bidirectional buffer utilizes
advanced silicon-gate CMOS technology, and is intended
for two-way asynchronous communication between data
buses. It has high drive current outputs which enable high
speed operation even when driving large bus capaci-
tances. This circuit possesses the low power consumption
and high noise immunity usually associated with CMOS cir-
cuitry, yet has speeds comparable to low power Schottky
TTL circuits.
This device has an active LOW enable input G and a direc-
tion control input, DIR. When DIR is HIGH, data flows from
the A inputs to the B outputs. When DIR is LOW, data flows
from the B inputs to the A outputs. The MM74HC245A
transfers true data from one bus to the other.
This device can drive up to 15 LS-TTL Loads, and does not
have Schmitt trigger inputs. All inputs are protected from
damage due to static discharge by diodes to VCC and
ground.
Features
s Typical propagation delay: 13 ns
s Wide power supply range: 2–6V
s Low quiescent current: 80 µA maximum (74 HC)
s 3-STATE outputs for connection to bus oriented systems
s High output drive: 6 mA (minimum)
s Same as the 645
Ordering Code:
Order Number Package Number
Package Description
MM74HC245AWM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
MM74HC245ASJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC245AMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC245AN
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
Pin Assignments for DIP, SOIC, SOP and TSSOP
Control
Inputs
G DIR
LL
LH
H
H = HIGH Level
L = LOW Level
X = Irrelevant
X
Operation
B data to A bus
A data to B bus
Isolation
Top View
© 1999 Fairchild Semiconductor Corporation DS005165.prf
www.fairchildsemi.com
1 page  
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
Package Number M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
www.fairchildsemi.com
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