(PDF) MM74C905N Datasheet - 12-Bit Successive Approximation Register

Número de pieza	MM74C905N
Descripción	12-Bit Successive Approximation Register
Fabricantes	Fairchild
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No Preview Available ! October 1987 Revised January 1999 MM74C905 12-Bit Successive Approximation Register General Description The MM74C905 CMOS 12-bit successive approximation register contains all the digit control and storage necessary for successive approximation analog-to-digital conversion. Because of the unique capability of CMOS to switch to each supply rail without any offset voltage, it can also be used in digital systems as the control and storage element in repetitive routines. Features s Wide supply voltage range: 3.0V to 15V s Guaranteed noise margin: 1.0V s High noise immunity: 0.45 VCC (typ) s Low power TTL compatibility: Fan out of 2 driving 74L s Provision for register extension or truncation s Operates in START/STOP or continuous conversion mode s Drive ladder switches directly. For 10 bits or less with 50k/100k R/2R ladder network Ordering Code: Order Number Package Number Package Description MM74C905N N24A 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide Connection Diagram Pin Assignments for DIP © 1999 Fairchild Semiconductor Corporation DS005910.prf www.fairchildsemi.com 1 page Timing Diagram 5 www.fairchildsemi.com 5 Page

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PDF MM74C905N Data sheet ( Hoja de datos )