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Número de pieza | MAX9486 | |
Descripción | 8kHz Reference Clock Synthesizer with Multiple Outputs at 35.328MHz | |
Fabricantes | Maxim Integrated | |
Logotipo | ||
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EVAALVUAAILTAIOBNLEKIT
8kHz Reference Clock Synthesizer
with Multiple Outputs at 35.328MHz
General Description
The MAX9486 low-cost, high-performance clock syn-
thesizer with an 8kHz input reference clock provides six
buffered LVTTL clock outputs at 35.328MHz. The clock
synthesizer can be used to generate the clocks for T1,
E1, T3, E3, and xDSL.
The MAX9486 has two phase-lock loops (PLLs). The
first PLL uses a voltage-controlled crystal oscillator
(VCXO). The second PLL is a frequency multiplier. With
the two PLLs, the MAX9486 generates the output fre-
quency at 35.328MHz. In addition, this device gener-
ates a jitter-suppressed 8kHz output that provides a
better source for the reference clock relay.
The MAX9486 is available in a 24-pin TSSOP package
and operates over the extended operating temperature
range of -40°C to +85°C and a single +3V to +3.6V
power-supply range.
Features
♦ 8kHz Input Reference CLK
♦ High-Jitter Rejection on the Reference CLK
♦ Synthesizer Locks to the 8kHz Reference with a
±200ppm Range
♦ Output Frequency: 35.328MHz
♦ Six Buffered LVTTL Low-Jitter Outputs
♦ One 8kHz Reference CLK Relay Output
♦ +3.3V Supply Operation
♦ 24-Pin TSSOP Package
Applications
Telecom Equipment Using T1, E1, T3, E3, and
ISDN Protocols
xDSL Equipment in CO with Interface to the
Telecom Protocols
PART
MAX9486EUG
Ordering Information
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
24 TSSOP
Pin Configuration
Typical Application Circuit
TOP VIEW
SHDN 1
REO 2
REIN 3
VDDP 4
GNDP 5
X1 6
VDD 7
X2 8
GND 9
LP2 10
LP1 11
SETI 12
MAX9486
TSSOP
24 CLK1
23 GND
22 CLK2
21 VDD
20 CLK3
19 VDD
18 GND
17 CLK4
16 VDD
15 CLK5
14 GND
13 CLK6
R1 C1
C2
LP1 LP2
X1
X2
VDDP
VDD
SETI CLK1
CLK2
RSET MAX9486
CLK3
GNDP
CLK4
VDD
SHDN
CLK5
CLK6
REIN
GND
REO
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page 8kHz Reference Clock Synthesizer
with Multiple Outputs at 35.328MHz
PIN
1
2
3
4
5
6
7, 16, 19,
21
8
9, 14, 18,
23
10
11
12
13
15
17
20
22
24
NAME
SHDN
REO
REIN
VDDP
GNDP
X1
VDD
X2
GND
LP2
LP1
SETI
CLK6
CLK5
CLK4
CLK3
CLK2
CLK1
Pin Description
FUNCTION
Active-Low Shutdown Input
Reference Clock Output. REO is an 8kHz reference clock output with jitter suppression.
Reference Input
Phase-Lock Loop (PLL) Power Supply. Bypass VDDP with 0.1µF and 0.001µF capacitors to GNDP.
PLL Ground
Crystal Input 1. Connect X1 to a fundamental mode crystal for the VCXO.
Digital Power Supply. Bypass VDD with 0.1µF and 0.001µF capacitors to GND.
Crystal Input 2. Connect X2 to a fundamental mode crystal for the VCXO.
Ground
External Filter 2. Connect the loop filter capacitors and a resistor between LP1 and LP2 (see the Typical
Application Circuit). LP2 is internally connected to GNDP.
External Filter 1. Connect the loop filter capacitors and a resistor between LP1 and LP2 (see the Typical
Application Circuit).
Charge-Pump Current-Setting Input. Connect a resistor from SETI to GNDP to set PLL charge-pump current
(see the Detailed Description section).
Clock Output 6 at 35.328MHz
Clock Output 5 at 35.328MHz
Clock Output 4 at 35.328MHz
Clock Output 3 at 35.328MHz
Clock Output 2 at 35.328MHz
Clock Output 1 at 35.328MHz
_______________________________________________________________________________________ 5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet MAX9486.PDF ] |
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