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PDF 74VCXH16374 Data sheet ( Hoja de datos )

Número de pieza 74VCXH16374
Descripción Low Voltage 16-Bit D-Type Flip-Flop with Bushold
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! 74VCXH16374 Hoja de datos, Descripción, Manual

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January 2000
Revised June 2005
74VCXH16374
Low Voltage 16-Bit D-Type Flip-Flops with Bushold
General Description
The VCXH16374 contains sixteen non-inverting D-type
flip-flops with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. A buff-
ered clock (CP) and output enable (OE) are common to
each byte and can be shorted together for full 16-bit opera-
tion.
The VCXH16374 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The 74VCXH16374 is designed for low voltage (1.4V to
3.6V) VCC applications with output compatibility up to 3.6V.
The 74VCXH16374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.4V to 3.6V VCC supply operation
s 3.6V tolerant control inputs and outputs
s Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
s tPD
3.0 ns max for 3.0V to 3.6V VCC
s Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
s Uses patented noise/EMI reduction circuitry
s Latch-up performance exceeds 300 mA
s ESD performance:
Human body model ! 2000V
Machine model ! 200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Order Number Package Number
Package Descriptions
74VCXH16374GX
(Note 1)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary) [TAPE and REEL]
74VCXH16374MTD
(Note 2)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 1: BGA package available in Tape and Reel only.
Note 2: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
© 2005 Fairchild Semiconductor Corporation DS500228
www.fairchildsemi.com

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74VCXH16374 pdf
DC Electrical Characteristics (Continued)
Symbol
Parameter
Conditions
VOL
II
II(HOLD)
II(OD)
LOW Level Output Voltage
Input Leakage Current
Bushold Input Minimum
Drive Hold Current
Bushold Input Over-Drive
Current to Change State
Control Pins
Data Pins
IOL 100 PA
IOL 12 mA
IOL 18 mA
IOL 24 mA
IOL 100 PA
IOL 12 mA
IOL 18 mA
IOL 100 PA
IOL 6 mA
IOL 100 PA
IOL 2 mA
0 d VI d 3.6V
VI VCC or GND
VIN 0.8V
VIN 2.0V
VIN 0.7V
VIN 1.6V
VIN 0.57V
VIN 1.07V
(Note 6)
(Note 7)
(Note 6)
(Note 7)
(Note 6)
(Note 7)
IOZ 3-STATE Output Leakage
0 d VO d 3.6V
VI VIH or VIL
IOFF Power-OFF Leakage Current
0 d (VO) d 3.6V
ICC Quiescent Supply Current
VI VCC or GND
VCC d (VO) d 3.6V (Note 8)
'ICC
Increase in ICC per Input
VIH VCC 0.6V
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: Outputs disabled or 3-STATE only.
VCC
(V)
2.7 - 3.6
2.7
3.0
3.0
2.3 - 2.7
2.3
2.3
1.65 - 2.3
1.65
1.4 - 1.6
1.4
2.7 - 3.6
2.7 - 3.6
3.0
3.0
2.3
2.3
1.65
1.65
3.6
3.6
2.7
2.7
1.95
1.95
1.4 - 3.6
0
1.4 - 3.6
1.4 - 3.6
2.7 - 3.6
Min
75.0
75.0
45.0
45.0
25.0
25.0
450
450
300
300
200
200
Max
Units
0.2
0.4
0.4
0.55
0.2
0.4 V
0.6
0.2
0.3
0.2
0.35
r5.0
PA
r5.0
PA
PA
r10.0
10.0
20.0
r20.0
750
PA
PA
PA
PA
PA
5 www.fairchildsemi.com

5 Page





74VCXH16374 arduino
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
11 www.fairchildsemi.com

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