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PDF MAX5842 Data sheet ( Hoja de datos )
| Número de pieza | MAX5842 | |
| Descripción | Quad / 12-Bit / Low-Power / 2-Wire / Serial Voltage-Output DAC | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MAX5842 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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19-2317; Rev 0; 1/02
Quad, 12-Bit, Low-Power, 2-Wire, Serial
Voltage-Output DAC
General Description
The MAX5842 is a quad, 12-bit voltage-output, digital-
to-analog converter (DAC) with an I2C™-compatible,
2-wire interface that operates at clock rates up to
400kHz. The device operates from a single 2.7V to 5.5V
supply and draws only 230µA at VDD = 3.6V. A power-
down mode decreases current consumption to less
than 1µA. The MAX5842 features three software-selec-
table power-down output impedances: 100kΩ, 1kΩ,
and high impedance. Other features include internal
precision Rail-to-Rail® output buffers and a power-on
reset (POR) circuit that powers up the DAC in the
100kΩ power-down mode.
The MAX5842 features a double-buffered I2C-compati-
ble serial interface that allows multiple devices to share
a single bus. All logic inputs are CMOS-logic compati-
ble and buffered with Schmitt triggers, allowing direct
interfacing to optocoupled and transformer-isolated
interfaces. The MAX5842 minimizes digital noise
feedthrough by disconnecting the clock (SCL) signal
from the rest of the device when an address mismatch
is detected.
The MAX5842 is specified over the extended tempera-
ture range of -40°C to +85°C and is available in a
miniature 10-pin µMAX package. Refer to the MAX5841
data sheet for the 10-bit version.
Applications
Digital Gain and Offset Adjustments
Programmable Voltage and Current Sources
Programmable Attenuation
VCO/Varactor Diode Control
Low-Cost Instrumentation
Battery-Powered Equipment
ATE
Pin Configuration
TOP VIEW
ADD 1
SCL 2
VDD 3
GND 4
SDA 5
MAX5842
10 OUTD
9 OUTC
8 OUTB
7 OUTA
6 REF
µMAX
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
I2C is a trademark of Philips Corp.
Features
o Ultra-Low Supply Current
230µA at VDD = 3.6V
280µA at VDD = 5.5V
o 300nA Low-Power Power-Down Mode
o Single 2.7V to 5.5V Supply Voltage
o Fast 400kHz I2C-Compatible 2-Wire Serial
Interface
o Schmitt-Trigger Inputs for Direct Interfacing to
Optocouplers
o Rail-to-Rail Output Buffer Amplifiers
o Three Software-Selectable Power-Down Output
Impedances
100kΩ, 1kΩ, and High Impedance
o Read-Back Mode for Bus and Data Checking
o Power-On Reset to Zero
o 10-Pin µMAX Package
Ordering Information
PART
TEMP
RANGE
PIN-
PACKAGE
MAX5842LEUB -40oC to +85oC 10 µMAX
MAX5842MEUB -40oC to +85oC 10 µMAX
ADDRESS
0111 10X
1011 10X
Typical Operating Circuit
VDD
µC
SDA SCL
VDD
RP
RP
RS VDD
SCL OUTA
RS SDA MAX5842 OUTB
OUTC
REF
OUTD
RS
SCL VDD
RS SDA MAX5842 OUTA
OUTB
REF
OUTC
OUTD
REF
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Quad, 12-Bit, Low-Power, 2-Wire, Serial
Voltage-Output DAC
(VDD = +5V, RL = 5kΩ.)
ZERO-CODE ERROR
vs. SUPPLY VOLTAGE
10
8
6
4
2
0
2.7
NO LOAD
3.4 4.1 4.8
SUPPLY VOLTAGE (V)
5.5
GAIN ERROR vs. TEMPERATURE
-2.0
-1.6
-1.2
-0.8
-0.4
0
-40
NO LOAD
-15 10 35 60
TEMPERATURE (°C)
85
SUPPLY CURRENT vs. INPUT CODE
320
Typical Operating Characteristics (continued)
ZERO-CODE ERROR
vs. TEMPERATURE
10
8
6
4
2
0
-40
NO LOAD
-15 10 35 60
TEMPERATURE (°C)
85
DAC OUTPUT VOLTAGE
vs. OUTPUT SOURCE CURRENT (NOTE 6)
6
5
4
3
2
1
CODE = FFF hex
0
02468
OUTPUT SOURCE CURRENT (mA)
10
SUPPLY CURRENT vs. TEMPERATURE
320
GAIN ERROR vs. SUPPLY VOLTAGE
-2.0
-1.6
-1.2
-0.8
-0.4
0
2.7
NO LOAD
3.4 4.1 4.8
SUPPLY VOLTAGE (V)
5.5
DAC OUTPUT VOLTAGE
vs. OUTPUT SINK CURRENT (NOTE 6)
2.5
2.0
1.5
1.0
0.5
CODE = 400 hex
0
02468
OUTPUT SINK CURRENT (mA)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
320
10
300 300
300
280 280
280
260
240
0
819 1638 2457 3276 4096
INPUT CODE
260
N0 LOAD
CODE = FFF hex
240
-40 -15 10
35
TEMPERATURE (°C)
60
85
260
240
2.7
CODE = FFF hex
NO LOAD
3.4 4.1 4.8
SUPPLY VOLTAGE (V)
5.5
_______________________________________________________________________________________ 5
5 Page 
Quad, 12-Bit, Low-Power, 2-Wire, Serial
Voltage-Output DAC
MSB
S A6
A5
A4 A3
A2 A1
LSB
A0 R/W
MSB LSB
ACK C3 C2 C1 C0 D11 D10 D9 D8 ACK
MSB LSB
D7 D6 D5 D4 D3 D2 D1 D0
ACK
P
EXAMPLE WRITE DATA SEQUENCE
MSB LSB MSB
LSB
S A6 A5 A4 A3 A2 A1 A0 R/W ACK C3 C2 C1 C0 D11 D10 D9 D8 ACK
MSB LSB
X X D C B A PD1 PD0 ACK
P
EXAMPLE WRITE TO POWER-DOWN REGISTER SEQUENCE
Figure 6. Example Write Command Sequences
to the selected power-down mode based on the states
of PD0 and PD1 (Table 1). Any combination of the four
DACs can be controlled with a single write sequence.
Read Data Format
In read mode (R/W = 1), the MAX5842 writes the con-
tents of the DAC register to the bus. The direction of
data flow reverses following the address acknowledge
by the MAX5842. The device transmits the first byte of
data, waits for the master to acknowledge, then trans-
mits the second byte. Figure 8 shows an example read
data sequence.
I2C Compatibility
The MAX5842 is compatible with existing I2C systems.
SCL and SDA are high-impedance inputs; SDA has an
open drain that pulls the data line low during the ninth
clock pulse. The Typical Operating Circuit shows a typ-
ical I2C application. The communication protocol sup-
ports the standard I2C 8-bit communications. The
general call address is ignored. The MAX5842 address
is compatible with the 7-bit I2C addressing protocol
only. No 10-bit address formats are supported.
Digital Feedthrough Suppression
When the MAX5842 detects an address mismatch, the
serial interface disconnects the SCL signal from the
core circuitry. This minimizes digital feedthrough
caused by the SCL signal on a static output. The serial
interface reconnects the SCL signal once a valid
START condition is detected.
X X D C B A PD1 PD0
Figure 7. Extended Command Byte Definition
Applications Information
Digital Inputs and Interface Logic
The MAX5842 2-wire digital interface is I2C/SMBus
compatible. The two digital inputs (SCL and SDA) load
the digital input serially into the DAC. Schmitt-trigger
buffered inputs allow slow-transition interfaces such as
optocouplers to interface directly to the device. The
digital inputs are compatible with CMOS logic levels.
Power-Supply Bypassing and
Ground Management
Careful PC board layout is important for optimal system
performance. Keep analog and digital signals separate
to reduce noise injection and digital feedthrough. Use a
ground plane to ensure that the ground return from
GND to the power-supply ground is short and low
impedance. Bypass VDD with a 0.1µF capacitor to
ground as close to the device as possible.
Chip Information
TRANSISTOR COUNT: 17,213
PROCESS: BiCMOS
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet MAX5842.PDF ] | |
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