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PDF MAX4841 Data sheet ( Hoja de datos )

Número de pieza MAX4841
Descripción Overvoltage Protection Controllers with Status FLAG
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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19-3044; Rev 0; 10/03
Overvoltage Protection Controllers with
Status FLAG
General Description
The MAX4838–MAX4841 are overvoltage protection ICs
that protect low-voltage systems against voltages of up
to 28V. If the input voltage exceeds the overvoltage trip
level, the MAX4838–MAX4841 turn off the low-cost
external N-channel FET(s) to prevent damage to the
protected components. An internal charge pump elimi-
nates the need for external capacitors and drives the
FET gate for a simple, robust solution.
The MAX4838/MAX4839 have a 7.4V overvoltage
threshold, and the MAX4840/MAX4841 have a 5.8V
overvoltage threshold. All devices have an undervolt-
age lockout threshold of 3.25V. In addition to the single
FET configuration, the devices can be configured with
back-to-back external FETs to prevent currents from
being back-driven into the adapter.
On power-up, the device waits for 50ms before driving
GATE high. FLAG is held low for an additional 50ms
after GATE goes high before deasserting. The
MAX4838/MAX4840 have an open-drain FLAG output,
and the MAX4839/MAX4841 have a push-pull FLAG
output. The FLAG output asserts immediately to an
overvoltage fault.
Additional features include a 15kV ESD-protected input
(when bypassed with a 1µF capacitor) and a shutdown
pin (EN) to turn off the device (MAX4838/MAX4840).
All devices are offered in a small 6-pin SC70 package
and are specified for operation from -40°C to +85°C.
Features
o Overvoltage Protection Up to 28V
o Preset 7.4V or 5.8V Overvoltage Trip Level
o Drive Low-Cost NMOS FET
o Internal 50ms Startup Delay
o Internal Charge Pump
o Undervoltage Lockout
o 15kV ESD-Protected Input
o Voltage Fault FLAG Indicator
o 6-Pin SC70 Package
Ordering Information
PART
MAX4838EXT-T
MAX4839EXT-T
MAX4840EXT-T
MAX4841EXT-T
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-
PACKAGE
6 SC70-6
6 SC70-6
6 SC70-6
6 SC70-6
TOP
MARK
ABW
ABY
ABX
ABZ
Applications
Cell Phones
Digital Still Cameras
PDAs and Palmtop Devices
MP3 Players
Selector Guide
PART
UVLO
THRESHOLD
(V)
OV
TRIP
LEVEL
(V)
EN
INPUT
FLAG
OUTPUT
MAX4838EXT-T
MAX4839EXT-T
MAX4840EXT-T
MAX4841EXT-T
3.25
3.25
3.25
3.25
7.4 Yes Open-Drain
7.4 No Push-Pull
5.8 Yes Open-Drain
5.8 No Push-Pull
Typical Operating Circuit
INPUT
+1.2V TO +28V
1µF
OUTPUT
1
IN
4
GATE
NMOS
VIO
MAX4838–
MAX4841
6
EN
3
FLAG
2
GND
NOTE: EN AND PULLUP
RESISTOR ON MAX4838/
MAX4840 ONLY.
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX4841 pdf
Overvoltage Protection Controllers with
Status FLAG
PIN
MAX4838/ MAX4839/
MAX4840 MAX4841
11
22
33
44
5 5, 6
6
Pin Description
NAME
FUNCTION
IN
GND
FLAG
GATE
N.C.
EN
Input. IN is both the power-supply input and the overvoltage sense input. Bypass IN to
GND with a 1µF capacitor or larger.
Ground
Fault Indication Output, Active Low. FLAG is asserted low during undervoltage lockout
and overvoltage lockout conditions. FLAG is deasserted during normal operation. FLAG
is open-drain on the MAX4838/MAX4840, and push-pull on the MAX4839/MAX4841.
Gate-Drive Output. GATE is the output of an on-chip charge pump. When VUVLO < VIN <
VOVLO, GATE is driven high to turn on the external N-channel MOSFET(s).
No Connection. Can be connected to GND.
Device Enable Input, Active Low. Drive EN low or connect to ground to allow normal
device operation. Drive EN high to turn off the external MOSFET.
VIN
0V
VGATE
VFLAG
VUVLO
tSTART
5V
tGON
8V
0.3V
tBLANK
2.4V
Figure 1. Startup Timing Diagram
VIN
5V
VGATE
VFLAG
VOVLO
tGOFF
tFLAG
0.3V
Figure 2. Shutdown Timing Diagram
8V
0.4V
VIN
0V
IGATE
VOVLO
tOVP
80%
8V
VEN 1.47V
VGATE
tDIS
0.3V
Figure 3. Power-Up Overvoltage Timing Diagram
Figure 4. Disable Timing Diagram
_______________________________________________________________________________________ 5

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