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PDF MAX4570CAI Data sheet ( Hoja de datos )
| Número de pieza | MAX4570CAI | |
| Descripción | Serially Controlled / Dual 4x2 / Clickless Audio/Video Analog Crosspoint Switches | |
| Fabricantes | Maxim Integrated | |
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19-1397; Rev 0; 10/98
EVAALVUAAILTAIOBNLEKIT
Serially Controlled, Dual 4x2, Clickless
Audio/Video Analog Crosspoint Switches
General Description
The MAX4550/MAX4570 serial-interface, programma-
ble, dual 4x2 audio/video crosspoint switches are ideal
for multimedia applications. Each device contains two
identical crosspoint switch arrays, each with four inputs
and two outputs. To improve off-isolation, use the addi-
tional crosspoint inputs SA and SB as shunts. Each out-
put is selectively programmable for clickless or regular
mode operation. A set of internal resistive voltage-
dividers supplies DC bias for each output when using
AC-coupled inputs. Additionally, four auxiliary outputs
control additional circuitry via the MAX4550/MAX4570’s
2-wire or 3-wire interface.
The MAX4550/MAX4570 feature 80Ω on-resistance, 10Ω
on-resistance matching between channels, 5Ω on-
resistance flatness, and 0.014% total harmonic distor-
tion. Additionally, they feature off-isolation of at least
-110dB in the audio frequency range and -78dB at
4MHz, with -95dB crosstalk in the audio frequency
range and -54dB at 4MHz. The MAX4550 uses a 2-wire
I2C-compatible serial interface, while the MAX4570
uses a 3-wire SPI™/QSPI™ or MICROWIRE™-compati-
ble serial interface. These parts are available in 28-pin
SSOP and wide SO packages and are tested over
either the commercial (0°C to +70°C) or extended
(-40°C to +85°C) operating temperature range.
Features
o Selectable Soft Switching Mode for Clickless
Audio Operation
o 43Ω Typical On-Resistance (±5V Supplies)
o 5Ω Typical On-Resistance Matching Between
Channels
o 4Ω Typical On-Resistance Flatness
o 0.014% Total Harmonic Distortion with 1kΩ Load
o -110dB Off-Isolation at 20kHz
-78dB Off-Isolation at 4MHz
o -95dB Crosstalk at 20kHz
-54dB Crosstalk at 4MHz
o Serial Interface
2-Wire, Fast-Mode, I2C-Compatible (MAX4550)
3-Wire, SPI/QSPI/MICROWIRE-Compatible
(MAX4570)
o Four Auxiliary Outputs that Extend µP Ports
o Single-Supply Operation: +2.7V to +5.5V
Dual-Supply Operation: ±2.7V to ±5.5V
Pin Configuration
Set-Top Boxes
PC Multimedia Boards
High-End Audio Systems
Video Conferencing Systems
Applications
PART
MAX4550CAI
MAX4550CWI
MAX4550EAI
MAX4550EWI
MAX4570CAI
MAX4570CWI
MAX4570EAI
MAX4570EWI
Ordering Information
TEMP. RANGE
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
28 SSOP
28 Wide SO
28 SSOP
28 Wide SO
28 SSOP
28 Wide SO
28 SSOP
28 Wide SO
TOP VIEW
SB 1
NO3A 2
NO3B 3
BIASH 4
BIASL 5
NO4A 6
NO4B 7
V+ 8
COM2A 9
Q0 10
COM2B 11
Q1 12
A0 (CS) 13
SCL (SCLK) 14
MAX4550
MAX4570
28 SA
27 NO2B
26 NO2A
25 V-
24 V+
23 NO1B
22 NO1A
21 GND
20 COM1A
19 Q3
18 COM1B
17 Q2
16 A1 (DOUT)
15 SDA (DIN)
I2C is a trademark of Philips Corp.
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
SO/SSOP
( ) ARE FOR MAX4570.
Functional Diagram appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
1 page  
Serially Controlled, Dual 4x2, Clickless
Audio/Video Analog Crosspoint Switches
INTERFACE I/O CHARACTERISTICS
(V+ = +2.7V to +5.5V, V- = 0 to -5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
AUXILIARY OUTPUTS
Output High Voltage
VOH
ISOURCE = 1mA to GND, V+ = 4.75V
ISOURCE = 0.5mA to GND, V+ = 2.7V
Output Low Voltage
ISINK = 6mA, V+ = 2.7V
VOL ISINK = 12mA, V+ = 4.75V
DIGITAL INPUTS (SCK, DIN, CS, SCL, SDA)
Input High Voltage
V+ > 3.6V
VIH
V+ < 3.6V
Input Low Voltage
V+ > 3.6V
VIL V+ < 3.6V
Input Hysteresis
VHYST
Input Leakage Current (Note 7) ILEAK VNO_ _ = 0 or 5V
Input Capacitance
CNO
DIGITAL OUTPUTS (DOUT, SDA)
Output Low Voltage
ISINK = 6mA
VOL ISINK = 6mA
V+ = 4.75V
V+ = 2.7V
DOUT Output High Voltage
VOH
ISOURCE = 0.5mA
I2C TIMING (V+ = +4.75V to +5.25V, Figures 1, 2)
SCL Clock Frequency
fSCL
Bus Free Time between Stop
and Start Condition
tBUF
MIN TYP MAX UNITS
4.45 4.65
2.3 2.5
0.5
0.5
1.0
1.0
V
V
3.0
2.0
0.8
0.6
0.2
-1 0.01
1
5
V
V
V
µA
pF
V+ - 0.5 V+ - 0.1
0.4
0.8
V
V
DC 400 kHz
1.3 µs
STOP Condition Setup Time
Data Hold Time
Data Setup Time
Clock Low Period
Clock High Period
SCL/SDA Rise Time
(Note 12)
tSU:STO
tHD:DAT
tSU:DAT
tLOW
tHIGH
tR
0.6
0
100
1.3
0.6
20 +
0.1Cb
µs
0.9 µs
ns
µs
µs
300 ns
SCL/SDA Fall Time
(Note 12)
tF
20 +
0.1Cb
300 ns
SPI TIMING (V+ = +4.75V to +5.25V, Figures 3, 4)
Operating Frequency
fOP
DIN to SCLK Setup
fDS
DIN to SCLK Hold
fDH
SCLK Fall to Output Data Valid
CS to SCLK Rise Setup
CS to SCLK Rise Hold
fDO
fCSS
fCSH
CLOAD = 50pF
DC 2.1 MHz
100 ns
0 ns
20 200 ns
100 ns
0 ns
_______________________________________________________________________________________ 5
5 Page 
Serially Controlled, Dual 4x2, Clickless
Audio/Video Analog Crosspoint Switches
Table 3. AUX_ Data-Byte Format (C4 = “1”)
BIT
D7 Don’t care
D6 Don’t care
D5 Don’t care
DESCRIPTION
D4 Don’t care
D3
Controls output Q3; 1 = set output high,
0 = set output low.
D2
Controls output Q2; 1 = set output high,
0 = set output low.
D1
Controls output Q1; 1 = set output high,
0 = set output low.
D0
Controls output Q0; 1 = set output high,
0 = set output low.
Table 4. Clickless Mode/BIAS_ Data-Byte
Format (C5 = “1”)
BIT DESCRIPTION
D7
Controls COM2B clickless mode; 1 = enables
clickless mode, 0 = disables clickless mode.
D6
Controls COM1B clickless mode; 1 = enables
clickless mode, 0 = disables clickless mode.
D5
Controls COM2A clickless mode; 1 = enables
clickless mode, 0 = disables clickless mode.
D4
Controls COM1A clickless mode; 1 = enables
clickless mode, 0 = disables clickless mode.
D3
Controls COM2B bias resistors; 1 = connect bias
resistors, 0 = disconnect bias resistors.
D2
Controls COM1B bias resistors; 1 = connect bias
resistors, 0 = disconnect bias resistors.
D1
Controls COM2A bias resistors; 1 = connect bias
resistors, 0 = disconnect bias resistors.
D0
Controls COM1A bias resistors; 1 = connect bias
resistors, 0 = disconnect bias resistors.
2-Wire Serial Interface
The MAX4550 uses a 2-wire, fast-mode, I2C-compatible
serial interface. This protocol consists of an address
byte followed by the command and data bytes. To
address a given chip, the A0 and A1 bits in the
address byte must duplicate the values present at the
A0 and A1 pins of that chip. The rest of the address
bits control MAX4550 operation. The command and
data-byte details are described in the Command-Byte
and Data-Byte Programming section.
The 2-wire serial interface requires only two I/O lines of
a standard microprocessor port. Figures 1 and 2 detail
the timing diagram for signals on the 2-wire bus, and
Table 5 details the format of the signals. The MAX4550
is a receive-only device and must be controlled by a
bus master device. A bus master device communicates
by transmitting the address byte of the slave device
over the bus and then transmitting the desired informa-
tion. Each transmission consists of a start condition, the
MAX4550’s programmable slave-address byte, a com-
mand-byte, a data-byte, and finally a stop condition.
The slave device acknowledges the recognition of its
address by pulling the SDA line low for one clock peri-
od after the address byte is transmitted. The slave
device also issues a similar acknowledgment after the
command byte and again after the data byte.
Start and Stop Conditions
The bus-master signals the beginning of a transmission
with a start condition by transitioning SDA from high to
low while SCL is high. When the master has finished
communicating with the slave, it issues a stop condition
by transitioning SDA from low to high while SCL is high.
The bus is then free for another transmission.
Slave Address (Address Byte)
The MAX4550 uses an 8-bit-long slave address. To
select a slave address, connect A0 and A1 to V+ or
GND. The MAX4550 has four possible slave addresses,
thus a maximum of four of these devices may share the
same 2-bit address bus. The slave device (MAX4550)
monitors the serial bus continuously, waiting for a start
condition followed by an address byte. When a slave
device recognizes its address (10011A1A00), it
acknowledges that it is ready for further communication
by pulling the SDA line low while SCL is high.
3-Wire Serial Interface
The MAX4570 3-wire serial interface is SPI/
QSPI/MICROWIRE-compatible. An active-low chip-
select (CS) input enables the device to receive data
from the serial input (DIN). Data is clocked in on the ris-
ing edge of the serial-clock (SCLK) signal. A total of 16
bits are needed in each write cycle. Segmented write
cycles are allowed (two 8-bit-wide transfers) if CS
remains low. The first bit clocked into the MAX4550 is
the command byte’s MSB, and the last bit clocked in is
the data byte’s LSB. While shifting data, the device
remains in its original configuration. After all 16 bits are
clocked into the input shift register, a rising edge on CS
latches the data into the MAX4570 internal registers,
initiating the device’s change of state.
______________________________________________________________________________________ 11
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| PDF Descargar | [ Datasheet MAX4570CAI.PDF ] | |
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