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PDF MAX4562CEE Data sheet ( Hoja de datos )
| Número de pieza | MAX4562CEE | |
| Descripción | Serially Controlled / Clickless Audio/Video Switches | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-1461; Rev 0; 4/99
Serially Controlled, Clickless
Audio/Video Switches
General Description
The MAX4562/MAX4563 serial-interface controlled
switches are ideal for multimedia applications. Each
device features 30Ω max on-resistance (RON), 5Ω RON
match, and 5Ω RON flatness. Audio off-isolation and
crosstalk at 20kHz is -85dB, and video off-isolation and
crosstalk at 10MHz is -55dB. Both devices feature
“clickless” mode operation for audio applications.
The MAX4562/MAX4563 contain two normally open sin-
gle-pole/double-throw (SPDT) switches and two normal-
ly open single-pole/single-throw (SPST) switches. The
MAX4562 features a 2-wire I2C™-compatible serial
interface. The MAX4563 features a 3-wire SPI™/QSPI™/
MICROWIRE™-compatible serial interface. Both parts
are available in 16-pin QSOP packages and operate
over the commercial and extended temperature
ranges.
Applications
Set-Top Boxes
PC Multimedia Boards
Audio Systems
Video Conferencing Systems
Pin Configuration
TOP VIEW
Features
o Selectable Soft-Switching Mode for “Clickless”
Audio Operation
o 30Ω max On-Resistance
o Audio Performance
-85dB Off-Isolation at 20kHz
-85dB Crosstalk at 20kHz
-0.007% THD
o Video Performance
-55dB Off-Isolation at 10MHz
-55dB Crosstalk at 10MHz
o T-Switch Configurable for Improved Off-Isolation
o Serial Interface
2-Wire I2C-Compatible (MAX4562)
3-Wire SPI/QSPI/MICROWIRE-Compatible
(MAX4563)
o Single-Supply Operation from +2.7V to +5.5V
PART
MAX4562CEE
MAX4562EEE
MAX4563CEE
MAX4563EEE
Ordering Information
TEMP. RANGE
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
PIN-PACKAGE
16 QSOP
16 QSOP
16 QSOP
16 QSOP
V+ 1
NO1A 2
COM1 3
NO1B 4
GND 5
NO2A 6
COM2 7
NO2B 8
( ) ARE FOR MAX4563
MAX4562
MAX4563
16 SCL (SCLK)
15 SDA (DIN)
14 A0 (CS)
13 A1 (DOUT)
12 NO4
11 COM4
10 NO3
9 COM3
QSOP
Typical Operating Circuit
SIGNAL IN NO2A
COM2
COM3
NO3
NO2B SIGNAL OUT
I2C is a trademark of Philips Corp.
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
1 page  
Serially Controlled, Clickless
Audio/Video Switches
I/O INTERFACE CHARACTERISTICS
(V+ = +2.7V to +5.25V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
DIGITAL INPUTS (SCLK, DIN, CS, SCL, SDA, A0, A1)
Input Low Voltage
V+ = 5V
VIL V+ = 3V
CONDITIONS
MIN
Input High Voltage
V+ = 5V
VIH V+ = 3V
3
2
Input Hysteresis
VHYST
Input Leakage Current
ILEAK
Input Capacitance
CIN
DIGITAL OUTPUTS (DOUT, SDA)
Digital inputs = 0 or V+
f = 1MHz
-1
Output Low Voltage
DOUT Output High Voltage
VOL
VOH
ISINK = 6mA
ISOURCE = 0.5mA
V+ - 0.5
TYP
0.2
0.001
5
MAX UNITS
0.8
V
0.6
V
V
1 µA
pF
0.4 V
V
2-WIRE TIMING CHARACTERISTICS
(Figure 3, V+ = +2.7V to +5.25V, fSCL = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SCL Clock Frequency
SYMBOL
fSCL
CONDITIONS
V+ = 2.7V to 5.25V
V+ = 4.75V to 5.25V
MIN TYP MAX UNITS
0 100
kHz
400
Bus Free Time between Stop
and Start Conditions
tBUF
4.7 µs
Hold Time After Start Condition
Stop Condition Setup Time
Data Hold Time
Data Setup Time
Clock Low Period
Clock High Period
SCL/SDA Rise Time
tHD:STA
tSU:STO
tHD:DAT
tSU:DAT
tLOW
tHIGH
The first clock is generated after this period
tR
4.0
4.0
0
250
4.7
4.0
20 +
0.1Cb
µs
µs
µs
ns
µs
µs
300 ns
SCL/SDA Fall Time
Pulse Width of Suppressed Spike
tF
20 +
0.1Cb
0
300 ns
50 ns
_______________________________________________________________________________________ 5
5 Page 
Serially Controlled, Clickless
Audio/Video Switches
Table 1. Command-Bit Mapping
C1 C0
00
01
10
11
COMMAND
NO_OP
NO_OP
SWITCHSET
MODESET
DESCRIPTION
No Operation
No Operation
Sets specified switches open or closed.
Sets specified switches to soft or hard mode.
Table 2. Control-Bit Mapping
CONTROL BIT
D5
D4
D3
D2
D1
D0 (LSB)
SWITCH
SW1A
SW1B
SW2A
SW2B
SW3
SW4
SWITCH TERMINAL
2, 3
3, 4
6, 7
7, 8
9, 10
11, 12
Applications Information
Switch Control
The MAX4562/MAX4563 have a common command-
and control-bit structure; the only difference is the inter-
face type (2-wire or 3-wire).
The SWITCHSET command controls the open/closed
states of the various switches. MODESET controls
soft/hard-mode switch states. The NO_OP command is
useful for daisy-chaining multiple 3-wire parts.
Table 1 shows the command bits’ configuration and their
related commands. Table 2 shows the configuration of
the data bits and their related switches. After a SWITCH-
SET command is issued, a logic “1” in any data-bit loca-
tion closes the associated switch, while a logic “0”
opens it. After a MODESET command, a logic “1” in any
data-bit location sets the associated switch into soft
mode, while a logic “0” sets it into hard mode.
2-Wire Serial Interface
The MAX4562 uses a 2-wire I2C-compatible serial inter-
face, requiring only two I/O lines of a standard micro-
processor port for communication. These devices use
a SendByte™ protocol. The SendByte protocol consists
of one byte of address field followed by one byte of
command field.
The first byte of any 2-wire serial-interface transaction is
always the address byte. To address a given chip, the
SendByte is a trademark of Philips Corp.
A0 and A1 bits in the address byte (Table 3) must dupli-
cate the values present at the A0 and A1 pins of that
chip, and the rest of the address bits must be configured
as shown in Table 3. Connect the A0 and A1 pins to V+
or GND or drive them with CMOS logic levels.
The second byte is the command byte, which sets the
command being written to the device. The possible
commands are MODESET and SWITCHSET. Figures 3
and 4 and the I/O Interface Characteristics detail the tim-
ing of the 2-wire serial-interface protocol. All bytes of the
transmission, whether address or command, are sent
MSB first.
The MAX4562/MAX4563 are receive-only devices and
must be controlled by a bus master device. A bus mas-
ter signals the beginning of a transmission with a start
condition by transitioning SDA from high to low while
SCL is high. The slave devices monitor the serial bus
continuously, waiting for the start condition followed by
an address byte. When a device recognizes its address
byte, it acknowledges by pulling the SDA line low for one
clock period; it is then ready to accept the command
byte. The device also issues a similar acknowledgment
after the command byte. When the master has finished
communicating with the slave, it issues a stop condition
by transitioning SDA from low to high while SCL is high.
The bus is then free for another transmission.
3-Wire Serial Interface
The MAX4563 uses a 3-wire SPI/QSPI/MICROWIRE-com-
patible serial interface. An active-low chip select (CS) pin
enables the device to receive data from the serial input
pin, DIN. Command and data information are clocked in
on the rising edge of the serial clock signal (SCLK) MSB
first. A total of eight bits is needed in each write cycle.
The command code is contained in the two MSBs of the
8-bit word. The remaining bits control the switches as
shown in Table 4. While shifting in the serial data, the
device remains in its original configuration. A rising edge
on CS latches the data into the MAX4563’s internal regis-
ter, initiating the device’s change of state. Table 4 shows
the details of the 3-wire interface structure.
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet MAX4562CEE.PDF ] | |
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