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PDF M48T212V Data sheet ( Hoja de datos )

Número de pieza M48T212V
Descripción 3.3V TIMEKEEPER supervisor
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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M48T212V
3.3V TIMEKEEPER® supervisor
Features
Integrated real-time clock, power-fail control
circuit, battery and crystal
)Converts low power SRAM into NVRAMs
t(sYear 2000 compliant (4-digit year)
cBattery low flag
duMicroprocessor power-on reset
roProgrammable alarm output active in the
P )battery backed-up mode
te t(sWatchdog timer
ole ucAutomatic power-fail chip deselect and WRITE
s dprotection
b roWRITE protect voltage
O P(VPFD = Power-fail deselect voltage):
) - te– M48T212V: VCC = 3.0 to 3.6V
t(s le2.7V VPFD 3.0V
oPackaging includes a 44-lead SOIC and
uc bsSNAPHAT® top (to be ordered separately)
d ORoHS compliant
OObbssoolleettee PPrrooduct(s) -– Lead-free second level interconnect
SNAPHAT (SH)
Crystal/battery
44
1
SOH44 (MH)
November 2007
Rev 7
1/35
www.st.com
1

1 page




M48T212V pdf
M48T212V
1 Description
Description
The M48T212V is a self-contained device that includes a real-time clock (RTC),
programmable alarms, a watchdog timer, and two external chip enable outputs which
provide control of up to four (two in parallel) external low-power static RAMs.
Access to all TIMEKEEPER® functions and the external RAM is the same as conventional
byte-wide SRAM. The 16 TIMEKEEPER Registers offer Century, Year, Month, Date, Day,
Hour, Minute, Second, Calibration, Alarm, Watchdog, and Flags. Externally attached static
RAMs are controlled by the M48T212V via the E1CON and E2CON signals (see Table 3 on
Obsolete PPrroodduucct(t(ss))Caution:
page 10).
The 44-pin, 330mil SOIC provides sockets with gold plated contacts at both ends for direct
connection to a separate SNAPHAT® housing containing the battery and crystal. The
unique design allows the SNAPHAT battery package to be mounted on top of the SOIC
package after the completion of the surface mount process.
Insertion of the SNAPHAT housing after reflow prevents potential battery and crystal
damage due to the high temperatures required for device surface-mounting. The SNAPHAT
housing is keyed to prevent reverse insertion.
The SOIC and battery/crystal packages are shipped separately in plastic anti-static tubes or
in Tape & Reel form. For the-44 lead SOIC, the battery/crystal package (e.g., SNAPHAT)
part number is “M4TXX-BR12SH” (see Table 20 on page 33).
Do not place the SNAPHAT battery/crystal top in conductive foam, as this will drain the
lithium button-cell battery.
t(s) - leteFigure 1. Logic diagram
uc bsoVCC VCCSW
Prod ) - O4
te t(sA0-A3
le uc A
bso rod E
O P EX
lete W
so G
Ob WDI
M48T212V
8
DQ0-DQ7
IRQ/FT
RST
E1CON
E2CON
RSTIN1
VOUT
RSTIN2
VSS
AI03019
5/35

5 Page





M48T212V arduino
M48T212V
Operation
Table 4. Chip enable control and bank select characteristics
Symbol
Parameter
tEXPD
tAPD
EX to E1CON or E2CON (low or high)
A to E1CON or E2CON (low or high)
M48T212V
–85
Min Max
15
15
Unit
ns
ns
2.2
Obsolete PPrroodduucct(t(ss))Note:
Read mode
The M48T212V executes a READ cycle whenever W (WRITE Enable) is high and E (Chip
Enable) is low. The unique address specified by the address inputs (A3-A0) defines which
one of the on-chip TIMEKEEPER® registers is to be accessed. When the address
presented to the M48T212V is in the range of 0h-Fh, one of the on-board TIMEKEEPER
registers is accessed and valid data will be available to the eight data output drivers within
tAVQV after the address input signal is stable, providing that the E and G access times are
also satisfied.If they are not, then data access must be measured from the latter occurring
signal (E or G) and the limiting parameter is either tELQV for E or tGLQV for G rather than the
address access time.
When EX input is low, an external SRAM location will be selected.
Care should be taken to avoid taking both E and EX low simultaneously to avoid bus
contention.
) - teFigure 5. Read cycle timing: RTC control signal waveforms
roduct(s - ObsoleADDRESS
te P ct(s)E
bsole roduG
O lete PW
Obso DQ7-DQ0
READ
tAVAV
READ
tAVAV
WRITE
tAVAV
tELQV
tAVQV
tAVWL
tWHAX
tELQX
tGLQV
tGLQX
tAXQX
DATA OUT
VALID
tWLWH
DATA OUT
VALID
tGHQZ
DATA IN
VALID
AI02640
Note:
EX is assumed high.
11/35

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