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PDF PIC14000-04 Data sheet ( Hoja de datos )
| Número de pieza | PIC14000-04 | |
| Descripción | 28-Pin Programmable Mixed Signal Controller | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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PIC14000
28-Pin Programmable Mixed Signal Controller
High-Performance RISC CPU:
• Only 35 single word instructions to learn
• All single cycle instructions except for program
branches which are two cycle
• Operating speed: DC - 20 MHz clock input
• 4096 x 14 on-chip EPROM program memory
• 192 x 8 general purpose registers (SRAM)
• 6 internal and 5 external interrupt sources
• 38 special function hardware registers
• Eight-level hardware stack
Analog Peripherals Features:
• Slope Analog-to-Digital (A/D) converter
- Eight external input channels including two
channels with selectable level shift inputs
- Six internal input channels
- 16-bit programmable timer with capture
register
- 16 ms maximum conversion time at maxi-
mum (16-bit) resolution and 4 MHz clock
- 4-bit programmable current source
• Internal bandgap voltage reference
• Factory calibrated with calibration constants
stored in EPROM
• On-chip temperature sensor
• Voltage regulator control output
• Two comparators with programmable references
• On-chip low voltage detector
Special Microcontroller Features:
• Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC
oscillator for reliable operation
• Multi-segment programmable code-protection
• Selectable oscillator options
- Internal 4 MHz oscillator
- External crystal oscillator
• Serial in-system programming (via two pins)
Pin Diagram
PDIP, SOIC, SSOP, Windowed CERDIP
RA1/AN1
RA0/AN0
RD3/REFB
RD2/CMPB
RD1/SDAB
RD0/SCLB
OSC2/CLKOUT
OSC1/PBTN
VDD
VREG
RC7/SDAA
RC6/SCLA
RC5
MCLR/VPP
• 1 28
2 27
3 26
4 25
5 24
6 23
7 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
RA2/AN2
RA3/AN3
RD4/AN4
RD5/AN5
RD6/AN6
RD7/AN7
CDAC
SUM
VSS
RC0/REFA
RC1/CMPA
RC2
RC3/T0CKI
RC4
Digital Peripherals Features:
• 22 I/O pins with individual direction control
• High current sink/source for direct LED drive
• TMR0: 8-bit timer/counter with 8-bit
programmable prescaler
• 16-bit A/D timer: can be used as a general
purpose timer
• I2C™ serial port compatible with System
Management Bus
CMOS Technology:
• Low-power, high-speed CMOS EPROM technology
• Fully static design
• Wide-operating voltage range (2.7V to 6.0V)
• Commercial and Industrial Temperature Range
• Low power dissipation (typical)
- < 3 mA @5V, 4 MHz operating mode
- < 300 µA @3V (Sleep mode: clocks stopped
with analog circuits active)
- < 5 µA @3V (Hibernate mode: clocks
stopped, analog inactive, and WDT disabled)
Applications:
• Battery Chargers
• Battery Capacity Monitoring
• Uninterruptable Power Supply Controllers
• Power Management Controllers
• HVAC Controllers
• Sensing and Data Acquisition
© 1996 Microchip Technology Inc.
Preliminary
This document was created with FrameMaker 4 0 4
DS40122B-page 1
1 page  
2.0 DEVICE VARIETIES
A variety of frequency ranges and packaging options
are available. The PIC14000 Product Selection System
section at the end of this data sheet provides the
devices options to be selected for your specific applica-
tion and production requirements. When placing
orders, please use the “PIC14000 Product Identifica-
tion System” at the back of this data sheet to specify the
correct part number.
2.1 UV Erasable Devices
The UV erasable version, offered in CERDIP package,
is optimal for prototype development and pilot
programs.
The UV erasable version can be erased and
reprogrammed to any of the configuration modes.
Note: Please note that erasing the device will
also erase the pre-programmed calibration
factors. Please refer to AN621 for more
information.
Microchip's PICSTART®, PICSTART-PLUS and
PRO MATE™ programmers all support programming of
the PIC14000. Third party programmers also are avail-
able; refer to the Microchip Third Party Guide for a list
of sources.
2.2 One-Time-Programmable (OTP)
Devices
The availability of OTP devices is especially useful for
customers who need the flexibility for frequent code
updates or small volume applications.
The OTP devices, packaged in plastic packages permit
the user to program them once. In addition to the
program memory, the configuration bits must also be
programmed.
PIC14000
2.3 Quick-Turnaround-Production (QTP)
Devices
Microchip offers a QTP Programming Service for
factory production orders. This service is made
available for users who choose not to program a
medium to high quantity of units and whose code
patterns have stabilized. The devices are identical to
the OTP devices but with all EPROM locations and
fuse options already programmed by the factory.
Certain code and prototype verification procedures do
apply before production shipments are available.
Please contact your local Microchip Technology sales
office for more details.
2.4 Serialized Quick-Turnaround
Production (SQTPSM) Devices
Microchip offers a unique programming service where
a few user-defined locations in each device are
programmed with different serial numbers. The serial
numbers may be random, pseudo-random or
sequential.
Serial programming allows each device to have a
unique number which can serve as an entry-code,
password or ID number.
© 1996 Microchip Technology Inc.
Preliminary
This document was created with FrameMaker 4 0 4
DS40122B-page 5
5 Page 
3.1 Clocking Scheme/Instruction Cycle
The clock input (from OSC1 or the internal oscillator) is
internally divided by four to generate four
non-overlapping quadrature clocks, namely Q1, Q2,
Q3 and Q4. The program counter (PC) is incremented
every Q1, the instruction is fetched from the program
memory and latched into the instruction register in Q4.
The instruction is decoded and executed during the
following Q1 through Q4. The clocks and instruction
execution flow are shown in Figure 3-2.
PIC14000
3.2 Instruction Flow/Pipelining
An “Instruction Cycle” consists of four Q cycles (Q1,
Q2, Q3 and Q4). The instruction fetch and execute are
pipelined such that fetch takes one instruction cycle
while decode and execute takes another instruction
cycle. However, due to the pipelining, each instruction
effectively executes in one cycle. If an instruction
causes the program counter to change (e.g., GOTO)
then two cycles are required to complete the instruction
(Example 3-1).
A fetch cycle begins with the program counter (PC)
incrementing in Q1.
In the execution cycle, the fetched instruction is latched
into the “Instruction Register (IR)” in cycle Q1. This
instruction is then decoded and executed during the
Q2, Q3, and Q4 cycles. Data memory is read during Q2
(operand read) and written during Q4 (destination
write).
FIGURE 3-2: CLOCK/INSTRUCTION CYCLE
OSC1
Q1
Q2
Q3
Q4
PC
CLKOUT
(IN mode)
Q1 Q2 Q3
PC
Fetch INST (PC)
Execute INST (PC-1)
Q4
Q1 Q2 Q3 Q4
PC+1
Fetch INST (PC+1)
Execute INST (PC)
Q1 Q2 Q3 Q4
PC+2
Fetch INST (PC+2)
Execute INST (PC+1)
Internal
Phase
Clock
EXAMPLE 3-1: INSTRUCTION PIPELINE FLOW
1. MOVLW 55h
Fetch 1
Execute 1
2. MOVWF PORTB
Fetch 2
Execute 2
3. CALL SUB_1
Fetch 3
Execute 3
4. BSF
PORTA, BIT3
FetchFeStUchB_41
FFlulusshh
Fetch SUB_1
All instructions are single cycle, except for program branches. These take two cycles
since the fetched instruction is “flushed” from the pipeline while the new instruction is
being fetched and then executed.
© 1996 Microchip Technology Inc.
Preliminary
DS40122B-page 11
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