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PDF PI90LV051L Data sheet ( Hoja de datos )

Número de pieza PI90LV051L
Descripción 3.3V LVDS High-Speed Differential Line Drivers and Receivers
Fabricantes ETC 
Logotipo ETC Logotipo



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No Preview Available ! PI90LV051L Hoja de datos, Descripción, Manual

PI90LV179, PI90LV180,
PI90LV050, PI90LV051111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222
3.3V LVDS High-Speed Differential Line Drivers and Receivers
Product Features
• Signaling Rates >660 Mbps (330 MHz)
• Single 3.3V Power Supply Design
• Driver:
— ±350mV Differential Swing into a 100-Ohm load
— Propogation Delay of 1.5ns Typ.
— Low Voltage TTL (LVTTL) Inputs are 5V Tolerant
— Driver is High Impedance when Disabled or VCC <1.5V
• Receiver:
— Accepts ±50mV (min.) Differential Swing with up to 2.0V
ground potential difference
— Propagation Delay of 3.3ns Typ.
— Low Voltage TTL (LVTTL) Outputs
— Open, Short, and Terminated Fail Safe
• Industrial Temperature Operating Range: –40°C to 85°C
• Package Options: SOIC, TSSOP, MSOP
• Meets or Exceeds IEEE 1596.3 SCI Standard
• Meets or Exceeds ANSI/TIA/EIA-644 LVDS Standard
• Bus-TerminalESDexceeds12kV
PI90LV179
VCC
ROUT
DIN
GND
18
2 8-Pin 7
3 U, W 6
45
RIN+
RIN
DOUT
DOUT+
DIN
ROUT
DOUT+
DOUT-
RIN+
RIN-
Product Description
ThePI90LV179,PI90LV180,PI90LV050,andPI90LV051aredifferen-
tial line drivers and receivers (transceivers) that are compliant with
the IEEE 1596.3 SCI and ANSI/TIA/EIA-644 LVDS standards. These
devices use low-voltage differential signaling (LVDS) to achieve
data rates in excess of 660 Mbps while being less susceptible to noise
than single-ended transmission.
The drivers translate a low-voltage TTL/CMOS input into a low-
voltage (350mV typical) differential output signal. The receivers
translate a differential 350mV input signal to a 3V CMOS output level.
The driver section can be independently set to a power-down and
high-impedance output mode with the DEN pin (active HIGH). The
receiver section is controlled by the REN* pin (active LOW).
Applications
Applications include point-to-point and multidrop baseband data
transmission over a controlled impedance media of approximately
100 ohms. These include intra-system connections via printed
circuit board traces or cables, hubs and routers for data communi-
cations; PBXs, switches, repeaters and base stations for telecommu-
nications and other applications such as digital cameras, printers
and copiers.
PI90LV050
RIN1
RIN1+
ROUT1
REN*
ROUT2
RIN2+
RIN2
GND
1 16
2 15
3
4
16-Pin
14
13
5 L, W 12
6 11
7 10
89
VCC
DIN1
DOUT1+
DOUT1
DEN
DOUT2
DOUT2+
DIN2
DIN1
DEN
DIN2
ROUT1
REN*
ROUT2
DOUT1+
DOUT1-
DOUT2+
DOUT2-
RIN1+
RIN1-
RIN2+
RIN2-
PI90LV180
NC
ROUT
REN*
DEN
DIN
GND
GND
1 14
2 13
3 14-Pin12
4
5
L, W
11
10
69
78
VCC
VCC
RIN+
RIN
DOUT
DOUT+
NC
DIN
DEN
REN*
ROUT
DOUT+
DOUT-
RIN+
RIN-
PI90LV051
RIN1
RIN1+
ROUT1
DEN1
ROUT2
RIN2+
RIN2
GND
1 16
2 15
3
4
16-Pin
14
13
5 L, W 12
6 11
7 10
89
VCC
DIN1
DOUT1+
DOUT1
DEN2
DOUT2
DOUT2+
DIN2
DIN1
DEN1
ROUT1
DIN2
DEN2
ROUT2
DOUT1+
DOUT1-
RIN1+
RIN1-
DOUT2+
DOUT2-
RIN2+
RIN2-
1
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05/01/01

1 page




PI90LV051L pdf
PI90LV179/PI90LV180/
PI90LV050/PI90LV051
112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334435566.37788V990011L2211V2233D4455S667788H9900i11g22h3344-55S6677p8899e00e1122d3344D5566i77f88f99e00r1122e11n2233t44i55a66l7788L9900i11n2233e4455D6677r88i99v0011e22r33s4455a6677n8899d0011R2211e2233c44e55i66v7788e99r0011s22
Receiver Switching Characteristics (over recommended operating conditions unless otherwise noted).
Parameter
Test Conditions Min. Typ.Max. Units
tPLH Propagation delay time, low-to-high-level output
1.9 2.9
tPHL
tsk(p)
tsk(pp)**
tsk(o)
tr
tf
tPZH
tPZL
tPHZ
tPLZ
Propagation delay time, lhigh-to-low-level output
Pulse skew (tPHL tPLH)
Part-part-part skew**
Channel-to-channel skew
CL = 10pF
See Figure 6
Output signal rise time
Output signal fall time
Propagation delay time, high-level-to-high-impedance output
Propagation delay time, low-level-to-low-impedance output
Propagation delay time, high-impedance-to-high-level output
See Figure 7
Propagation delay time, low-impedance-to-high-level output
2.1 3.1
ns
0.1 0.4
1.3
50 100 ps
1.2 1.7
1.4 2.0
1.5 2.7
ns
4.5 6.8
2.4 3.1
6.0 7.8
All typical values are at 25°C with a 3.3V supply
**tsk(pp): magnitude of difference in propagation delay times between any specific terminals of two devices (all things being equal)
Parameter Measurement Information
Driver
DEN
II
DIN
VI
DOUT+
DOUT–
DOD+
VOD
VOD+
VOC
VOD–
VOD+VOD+
2
Figure 1. Driver Voltage and Current Definitions
5
PS8539
05/01/01

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PI90LV051L arduino
PI90LV179/PI90LV180/
PI90LV050/PI90LV051
112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334435566.37788V990011L2211V2233D4455S667788H9900i11g22h3344-55S6677p8899e00e1122d3344D5566i77f88f99e00r1122e11n2233t44i55a66l7788L9900i11n2233e4455D6677r88i99v0011e22r33s4455a6677n8899d0011R2211e2233c44e55i66v7788e99r0011s22
8-Pin SOIC W Package
8
.149 3.78
.157 3.99
.0099
.0196
0.25
0.50
x 45˚
1
.189 4.80
.196 5.00
.016
.026
0.406
0.660
REF
0-8˚
.053 1.35
.068 1.75
SEATING PLANE
0.40 .016
1.27 .050
.2284
.2440
5.80
6.20
.0075 0.19
.0098 0.25
.050
BSC
1.27
.0040 0.10
.0098 0.25
.013 0.330
.020 0.508
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
8-Pin Mini Small Outline U Package (MSOP)
11
PS8539
05/01/01

11 Page







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