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PDF PI74AVC+16345A Data sheet ( Hoja de datos )

Número de pieza PI74AVC+16345A
Descripción 2.5V/ Registered 1-Bit to 4-Bit Address Driver w/3-State Outputs
Fabricantes Pericom Semiconductor Corporation 
Logotipo Pericom Semiconductor Corporation Logotipo



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PI74AVC+16345
1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
2.5V, Registered 1-Bit to 4-Bit Address
Driver w/3-State Outputs
Product Features
• PI74AVC+16345 is designed for low-voltage operation,
VCC = 1.65V to 3.6V
• True ±24mA Balanced Drive @3.3V
• IOFF supports partial power down operation
• I/O Tolerant to 3.6V
• All outputs contain a patented DDC
(Dynamic DriveControl) circuit that reduces noise without
degrading propagation delay.
• Industrial operation: –40°C to +85°C
• Available Packages:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 173 mil wide plastic TVSOP (K)
Product Description
Pericom Semiconductor’s PI74AVC+ series of logic circuits are
produced using the Company’s advanced submicron CMOS
technology, achieving industry leading speed.
The PI74AVC+16345 is ideal for driving memory modules in
systems where multiple memory modules are used. One each of the
four output banks drive a different module; modules can be added
or removed without affecting the signal integrity of the other
modules in the system. Dual clock enables (CEx) allow use of the
device in high-speed memory interleaving applications where the
clock can be alternately enabled and disabled, allowing the address
to be held for additional cycles during memory access.
To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current sinking
capability of the driver.
Logic Block Diagram
1
CE1
29
OE
D1 8
CE
D
56
CE2
1Q1
D5 36
4Q1
CE
D
1Q5
4Q5
D2 14
CE
D
1Q2
D6 42
4Q2
CE
D
1Q6
4Q6
D3 15
CE
D
1Q3
D7 43
4Q3
CE
D
1Q7
4Q7
D4 21
CLK 28
CE
D
1Q4
D8 49
4Q4
CE
D
1Q8
4Q8
1 PS8442A 08/06/01

1 page




PI74AVC+16345A pdf
PI74AVC+16345
2.5V, Registered 1-Bit to 4-Bit Address
1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788D9900r11i22v3344e55r6677w8899i00t11h223334455-66S77t88a9900t11e2211O2233u4455t66p7788u99t00s1122
Timing Requirements
(Over recommended operating free-air temperature range, unless otherwise noted, see Figures 1 thru 4)
VCC = 1.2V
Min Max
VCC = 1.5V
±0.1V
Min Max
VCC = 1.8V
±0.15V
Min Max
VCC = 2.5V
±0.2V
Min Max
fclock Clock Frequency
tW Pulse Width, CLK High or Low
tSU Setup Time, CEx to CLK, High or Low
tSU Setup Time, Dx to CLK, High or Low
tH Hold Time, CEx to CLK, High or Low
tH Hold Time, CLK to Dx, High or Low
150 180
6.0 3
2.0 1.5
2.0 1.5
00
0.5 0.5
VCC = 3.3V
±0.3V
Min Max
180
3
1.5
1.5
0
0.5
Units
MHz
ns
Switching Characteristics
(Over recommended operating free-air temperature range, unless otherwise noted, see Figures 1 thru 4)
Parameters
From
(Input)
To
(Output)
VCC = 1.2V
Min. Max.
VCC = 1.5V
±0.1V
Min. Max.
VCC = 1.8V
±0.15V
Min. Max.
VCC = 2.5V
±0.2V
Min. Max.
VCC = 3.3V
±0.3V
Min. Max. Units
fmax
tpd
ten
tdis
tSK(o) Output Skew(1)
tSK(b) Output Skew(1)
CLK
OE
OE
xQx
xQx
xQx
150
4.5
5.3
5.6
0.5
0.3
180 — 180 —
— 3.1 — 2.7
— 4.5 — 3.9
— 3.6 — 3.4
— 0.5 — 0.5
— 0.3 — 0.3
ns
Note:
1. This is the skew between any two outputs of the same package, and switching in the same direction.
For tSK(o) Output 1 and Output 2 are any two outputs. For tSK(b) Output 1 and Output 2 are in the same bank.
Operating Characteristics, TA= 25°C
Parameters
Test Conditions
Cpd Power Dissipation Output Enabled CL = 0pF, f = 10 MHZ
Capacitance
Outputs Disabled Four outputs switching
VCC = 1.8V
± 0.15V
Typical
84
48
VCC = 2.5V
±0.2V
Typical
95
55
VCC = 3.3V
±0.3V
Typical
110
63
Units
pF
5 PS8442A 08/06/01

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