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PDF PI74ALVCH16823 Data sheet ( Hoja de datos )
| Número de pieza | PI74ALVCH16823 | |
| Descripción | 18-Bit Bus-Interface Flip-Flop with 3-State Outputs | |
| Fabricantes | Pericom Semiconductor Corporation | |
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PI74ALVCH16823
1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
18-Bit Bus-Interface Flip-Flop
with 3-State Outputs
Product Features
• PI74ALVCH16823 is designed for low voltage operation
• VCC = 2.3V to 3.6V
• Hysteresis on all inputs
• Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
• Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
• Industrial operation at 40°C to +85°C
• Packages available:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 300 mil wide plastic SSOP (V)
Logic Block Diagram
Product Description
Pericom Semiconductors PI74ALVCH series of logic circuits are
produced in the Companys advanced 0.5 micron CMOS technology,
achieving industry leading speed.
The 18-bit PI74ALVCH16823 bus-interface flip-flop is designed
for 2.3V to 3.6V VCC operation. It features 3-state outputs designed
specifically for driving highly capacitive or relatively low-
impedance loads. This device is particularly suitable for
implementing wider buffer registers, I/O ports, bidirectional bus
drivers with parity, and working registers.
The PI74ALVCH16823 can be used as two 9-bit flip-flops or one
18-bit flip-flop. With the Clock Enable (CLKEN) input LOW, the
D-type flip-flops enter data on the low-to-high transitions of the
clock. Taking CLKEN HIGH disables the clock buffer, thus
latching the outputs. Taking the Clear (CLR) input LOW causes the
Q outputs to go LOW independently of the clock.
A buffered Output Enable (OE) input can be used to place the nine
outputs in either a normal logic state (high or low logic levels) or
high-impedance state. In the high-impedance state, the outputs
neither load nor drive the bus lines significantly. The high-impedance
state and increased drive provide the capability to drive bus lines
without need for interface or pullup components.
The Output Enable (OE) input does not affect the internal operation
of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
1 PS8103 04/03/97
1 page  
PI74ALVCH16823
18-BIT BUS-INTERFACE FLIP-FLOP
WITH 3-STATE OUTPUTS1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Timing Requirements over Operating Range
Parameters
Description
VCC = 2.5V ± 0.2V VCC = 2.7V VCC = 3.3V ± 0.3V
Conditions
Units
Min. Max. Min. Max. Min. Max.
fCLOCK
tW
Clock Frequency
CLR LOW
Pulse Duration
CLK HIGH or LOW
0 150 0 150 0
3.3 3.3 3.3
3.3 3.3 3.3
150 MHz
CLR LOW
0.7 0.7 0.8
Data LOW
tSU Setup Time
Data HIGH
CLKEN LOW
CL = 50pF
RL = 500W
1.4
1.1
1.8
1.6 1.3
1.1 1.0
1.9 1.5
ns
Data LOW
0.4 0.5 0.5
tH Hold Time Data HIGH
CLKEN LOW
0.7 0.1 0.8
0.2 0.3 0.4
Description
Dt/Dv(3)
Input Transition Rise or Fall
0 10 0 10 0
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
10 ns/V
Operating Characteristics, TA = 25ºC
Parameter
Test Conditions
CPD Power Dissipation
Capacitance
Outputs Enabled
Outputs Disabled
CL = 50pF,
f = 10 MHz
VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V
Typical
27 30
16 18
Units
pF
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5 PS8103 04/03/97
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet PI74ALVCH16823.PDF ] | |
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