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Número de pieza | PHP42N03LT | |
Descripción | TrenchMOS transistor Logic level FET | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de PHP42N03LT (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
No Preview Available ! Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHP42N03LT, PHB42N03LT
FEATURES
• ’Trench’ technology
• Very low on-state resistance
• Fast switching
• Stable off-state characteristics
• High thermal cycling performance
• Low thermal resistance
SYMBOL
g
d
s
QUICK REFERENCE DATA
VDSS = 30 V
ID = 42 A
RDS(ON) ≤ 26 mΩ (VGS = 5 V)
RDS(ON) ≤ 23 mΩ (VGS = 10 V)
GENERAL DESCRIPTION
N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology.
The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching
applications.
The PHP42N03LT is supplied in the SOT78 (TO220AB) conventional leaded package.
The PHB42N03LT is supplied in the SOT404 surface mounting package.
PINNING
PIN DESCRIPTION
1 gate
SOT78 (TO220AB)
tab
SOT404
tab
2 drain 1
3 source
tab drain
1 23
2
13
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 175˚C
Tj = 25 ˚C to 175˚C; RGS = 20 kΩ
Tmb = 25 ˚C; VGS = 5 V
Tmb = 100 ˚C; VGS = 5 V
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
30
30
± 15
42
30
168
86
175
UNIT
V
V
V
A
A
A
W
˚C
November 1998
1
Rev 1.400
1 page Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHP42N03LT, PHB42N03LT
1E-01
Sub-Threshold Conduction
1E-02
1E-03
2% typ 98%
1E-04
1E-05
1E-05
0 0.5 1 1.5 2 2.5
Fig.11. Sub-threshold drain current.
ID = f(VGS); VDS = VGS
3
C / pF
10000
9528-30
1000
Ciss
Coss
100
0.1
1 10
VDS / V
Crss
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); VGS = 0 V; f = 1 MHz
15 VGS, Gate-Source voltage (Volts)
VDD=24V
ID=20A
Tj = 25C
10
PHP50N03LT
5
0
0 10 20 30 40 50
Qg, Gate charge (nC)
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG)
IF / A
60
9528-30
50
40
Tj / C = 175
25
30
20
10
0
0 0.5 1 1.5
VSDS / V
Fig.14. Typical reverse diode current.
IF = f(VSDS)
2
November 1998
5
Rev 1.400
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet PHP42N03LT.PDF ] |
Número de pieza | Descripción | Fabricantes |
PHP42N03LT | TrenchMOS transistor Logic level FET | NXP Semiconductors |
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