|
|
PDF PHP130N03LT Data sheet ( Hoja de datos )
| Número de pieza | PHP130N03LT | |
| Descripción | TrenchMOS transistor Logic level FET | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de PHP130N03LT (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
|
No Preview Available !
Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHP130N03LT, PHB130N03LT
FEATURES
• ’Trench’ technology
• Very low on-state resistance
• Fast switching
• Stable off-state characteristics
• High thermal cycling performance
• Low thermal resistance
SYMBOL
g
d
s
QUICK REFERENCE DATA
VDSS = 30 V
ID = 75 A
RDS(ON) ≤ 6 mΩ (VGS = 5 V)
RDS(ON) ≤ 5 mΩ (VGS = 10 V)
GENERAL DESCRIPTION
N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology.
The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching
applications.
The PHP130N03LT is supplied in the SOT78 (TO220AB) conventional leaded package.
The PHB130N03LT is supplied in the SOT404 surface mounting package.
PINNING
PIN DESCRIPTION
1 gate
SOT78 (TO220AB)
tab
SOT404
tab
2 drain1
3 source
tab drain
1 23
2
13
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 175˚C
Tj = 25 ˚C to 175˚C; RGS = 20 kΩ
Tmb = 25 ˚C; VGS = 5 V
Tmb = 100 ˚C; VGS = 5 V
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
30
30
± 13
75
75
240
187
175
UNIT
V
V
V
A
A
A
W
˚C
1 It is not possible to make connection to pin 2 of the SOT404 package.
January 1998
1
Rev 1.300
1 page  
Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHP130N03LT, PHB130N03LT
a
2
30V TrenchMOS
1.5
1
0.5
0
-100
-50
0 50 100 150 200
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 25 A; VGS = 5 V
VGS(TO) / V
2.5
max.
2
typ.
1.5
min.
1
BUK959-60
0.5
0
-100
-50
0 50
Tj / C
100 150 200
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
1E-01
Sub-Threshold Conduction
1E-02
1E-03
2% typ 98%
1E-04
1E-05
1E-05
0 0.5 1 1.5 2 2.5
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
3
C / pF
10000
9506-30
Ciss
1000
Coss
Crss
100
0.1
1 10
VDS / V
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
VGS / V
5
9506-30
4
VDS / V = 6
24
3
2
1
0
0 20 40 60 80 100
QG / nC
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); conditions: ID = 75 A; parameter VDS
IF / A
100
9506-30
80
60
Tj / C = 175
25
40
20
0
0 0.5 1 1.5 2
VSDS / V
Fig.14. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
January 1998
5
Rev 1.300
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet PHP130N03LT.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| PHP130N03LT | TrenchMOS transistor Logic level FET | NXP Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |