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PDF PHD69N03LT Data sheet ( Hoja de datos )
| Número de pieza | PHD69N03LT | |
| Descripción | N-channel TrenchMOS transistor Logic level FET | |
| Fabricantes | NXP Semiconductors | |
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Philips Semiconductors
N-channel TrenchMOS™ transistor
Logic level FET
Product specification
PHP69N03LT, PHB69N03LT
PHD69N03LT
FEATURES
• ’Trench’ technology
• Very low on-state resistance
• Fast switching
• Low thermal resistance
• Logic level compatible
SYMBOL
d
g
s
QUICK REFERENCE DATA
VDSS = 25 V
ID = 69 A
RDS(ON) ≤ 12 mΩ (VGS = 10 V)
RDS(ON) ≤ 14 mΩ (VGS = 5 V)
GENERAL DESCRIPTION
N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology.
Applications:-
• High frequency computer motherboard d.c. to d.c. converters
• High current switching
The PHP69N03LT is supplied in the SOT78 (TO220AB) conventional leaded package.
The PHB69N03LT is supplied in the SOT404 (D2PAK) surface mounting package.
The PHD69N03LT is supplied in the SOT428 (DPAK)surface mounting package.
PINNING
SOT78 (TO220AB) SOT404 (D2PAK)
PIN DESCRIPTION
1 gate
tab
tab
SOT428 (DPAK)
tab
2 drain 1
3 source
tab drain
1 23
2
13
2
13
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
VGSM
ID
IDM
Ptot
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage (DC)
Gate-source voltage (pulse
peak value)
Drain current (DC)
Drain current (pulse peak
value)
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 175˚C
Tj = 25 ˚C to 175˚C; RGS = 20 kΩ
Tj ≤ 150˚C
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
25
25
± 15
± 20
69
48
240
125
175
UNIT
V
V
V
V
A
A
A
W
˚C
1 It is not possible to make connection to pin:2 of the SOT404 or SOT428 packages.
October 1999
1
Rev 1.600
1 page  
Philips Semiconductors
N-channel TrenchMOS™ transistor
Logic level FET
Product specification
PHP69N03LT, PHB69N03LTT
PHD69N03LT
Drain current, ID (A)
1.0E-01
VDS = 5 V
1.0E-02
1.0E-03
1.0E-04
minimum
typical
maximum
1.0E-05
1.0E-06
0 0.5 1 1.5 2 2.5 3
Gate-source voltage, VGS (V)
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
Capacitances, Ciss, Coss, Crss (pF)
10000
1000
Ciss
Coss
Crss
100
0.1
1 10
Drain-Source Voltage, VDS (V)
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
Gate-source voltage, VGS (V)
15
14 ID = 69 A
13 Tj = 25 C
12
11 VDD = 15 V
10
9
8
7
6
5
4
3
2
1
0
0 5 10 15 20 25 30 35 40 45 50
Gate charge, QG (nC)
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); parameter VDS
Source-Drain Diode Current, IF (A)
50
VGS = 0 V
45
40
35
30 175 C
25
Tj = 25 C
20
15
10
5
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5
Source-Drain Voltage, VSDS (V)
Fig.14. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
October 1999
5
Rev 1.600
5 Page 
Philips Semiconductors
N-channel TrenchMOS™ transistor
Logic level FET
Product specification
PHP69N03LT, PHB69N03LTT
PHD69N03LT
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
© Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
October 1999
11
Rev 1.600
11 Page | ||
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| PDF Descargar | [ Datasheet PHD69N03LT.PDF ] | |
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