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PDF PHD3N40E Data sheet ( Hoja de datos )
| Número de pieza | PHD3N40E | |
| Descripción | PowerMOS transistors Avalanche energy rated | |
| Fabricantes | NXP Semiconductors | |
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Philips Semiconductors
PowerMOS transistors
Avalanche energy rated
Product specification
PHP3N40E, PHB3N40E, PHD3N40E
FEATURES
• Repetitive Avalanche Rated
• Fast switching
• Stable off-state characteristics
• High thermal cycling performance
• Low thermal resistance
SYMBOL
g
d
s
QUICK REFERENCE DATA
VDSS = 400 V
ID = 2.5 A
RDS(ON) ≤ 3.5 Ω
GENERAL DESCRIPTION
N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies,
T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching
applications.
The PHP3N40E is supplied in the SOT78 (TO220AB) conventional leaded package.
The PHB3N40E is supplied in the SOT404 surface mounting package.
The PHD3N40E is supplied in the SOT428 surface mounting package.
PINNING
SOT78 (TO220AB) SOT404
SOT428
PIN DESCRIPTION
1 gate
tab
tab tab
2 drain1
3 source
tab drain
1 23
2
13
2
13
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total dissipation
Operating junction and
storage temperature range
Tj = 25 ˚C to 150˚C
Tj = 25 ˚C to 150˚C; RGS = 20 kΩ
Tmb = 25 ˚C; VGS = 10 V
Tmb = 100 ˚C; VGS = 10 V
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
400
400
± 30
2.5
1.5
10
50
150
UNIT
V
V
V
A
A
A
W
˚C
1 It is not possible to make connection to pin 2 of the SOT428 or SOT404 packages.
August 1998
1
Rev 1.100
1 page  
Philips Semiconductors
PowerMOS transistors
Avalanche energy rated
Product specification
PHP3N40E, PHB3N40E, PHD3N40E
8 Drain current, ID (A)
VDS > ID x RDS(on)max
7
6
5
PHP2N40
Tj = 25 C
150 C
4
3
2
1
0
0 2 4 6 8 10
Gate-source voltage, VGS (V)
Fig.7. Typical transfer characteristics.
ID = f(VGS); parameter Tj
Transconductance, gfs (S)
2.5
VDS > ID x RDS(on)max
2
Tj = 25 C
1.5
PHP2N40
150 C
1
0.5
0
01234567
Drain current, ID (A)
Fig.8. Typical transconductance.
gfs = f(ID); parameter Tj
8
a
2
Normalised RDS(ON) = f(Tj)
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 1.25 A; VGS = 10 V
VGS(TO) / V
4
3
2
max.
typ.
min.
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS
1E-01 ID / A
SUB-THRESHOLD CONDUCTION
1E-02
1E-03
2 % typ 98 %
1E-04
1E-05
1E-06
01234
VGS / V
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
1000 Capacitances, Ciss, Coss, Crss (pF)
Ciss
100
Coss
10 Crss
PHP2N40
1
1 10 100 1000
Drain-source voltage, VDS (V)
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
August 1998
5
Rev 1.100
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet PHD3N40E.PDF ] | |
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