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PDF PHB130N03T Data sheet ( Hoja de datos )
| Número de pieza | PHB130N03T | |
| Descripción | TrenchMOS transistor Standard level FET | |
| Fabricantes | NXP Semiconductors | |
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Philips Semiconductors
TrenchMOS™ transistor
Standard level FET
Product specification
PHB130N03T
GENERAL DESCRIPTION
N-channel enhancement mode
standard level field-effect power
transistor in a plastic envelope
suitable for surface mounting using
’trench’ technology. The device
features very low on-state resistance
and has integral zener diodes giving
ESD protection up to 2kV. It is
intended for use in DC-DC
converters and general purpose
switching applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
Tj
RDS(ON)
Drain-source voltage
Drain current (DC)1
Total power dissipation
Junction temperature
Drain-source on-state
resistance
VGS = 10 V
MAX.
30
75
188
175
6
PINNING - SOT404
PIN DESCRIPTION
1 gate
2 drain
3 source
mb drain
PIN CONFIGURATION
mb
2
13
SYMBOL
d
g
s
UNIT
V
A
W
˚C
mΩ
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDS
VDGR
±VGS
ID
ID
IDM
Ptot
Tstg, Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)1
Drain current (DC)1
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
-
RGS = 20 kΩ
-
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
-
THERMAL RESISTANCES
SYMBOL
Rth j-mb
Rth j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
-
minimum footprint, FR4
board
MIN.
-
-
-
-
-
-
-
- 55
MAX.
30
30
20
75
75
240
188
175
UNIT
V
V
V
A
A
A
W
˚C
TYP.
-
50
MAX.
0.8
-
UNIT
K/W
K/W
1 Current limited by package to 75A from a theoretical value of 130A.
December 1997
1
Rev 1.200
1 page  
Philips Semiconductors
TrenchMOS™ transistor
Standard level FET
Product specification
PHB130N03T
ID / A
100
7506-30
80
60
40
Tj / C = 175
25
20
0
0 2 4 6 8 10
VGS / V
Fig.7. Typical transfer characteristics.
ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj
gfs / S
80
7506-30
60
Tj / C = 25
40
175
20
0
0 20 40 60 80 100
ID / A
Fig.8. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID); conditions: VDS = 25 V
a
2
30V TrenchMOS
1.5
1
0.5
0
-100
-50
0 50 100 150 200
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 25 A; VGS = 10 V
VGS(TO) / V
5
max.
4
typ.
3
min.
2
BUK759-60
1
-0100
-50
0 50
Tj / C
100 150 200
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
1E-01
Sub-Threshold Conduction
1E-02
1E-03
2% typ
98%
1E-04
1E-05
1E-06
01234
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
5
C / pF
10000
7506-30
Ciss
1000
Coss
Crss
100
0.1
1 10
VDS / V
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
December 1997
5
Rev 1.200
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet PHB130N03T.PDF ] | |
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