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PDF MC12202D Data sheet ( Hoja de datos )
| Número de pieza | MC12202D | |
| Descripción | MECL PLL COMPONENTS Serial Input PLL Frequency Synthesizer | |
| Fabricantes | Motorola Semiconductors | |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Serial Input PLL Frequency
Synthesizer
The MC12202 is a 1.1GHz Bipolar monolithic serial input phase locked
loop (PLL) synthesizer with pulse–swallow function. It is designed to
provide the high frequency local oscillator signal of an RF transceiver in
handheld communication applications.
Motorola’s advanced Bipolar MOSAIC™ V technology is utilized for
low power operation at a minimum supply voltage of 2.7V. The device is
designed for operation over 2.7 to 5.5V supply range for input frequencies
up to 1.1GHz with a typical current drain of 6.5mA. The low power
consumption makes the MC12202 ideal for handheld battery operated
applications such as cellular or cordless telephones, wireless LAN or
personal communication services. A dual modulus prescaler is integrated
to provide either a 64/65 or 128/129 divide ratio.
For additional applications information, two InterActiveApNote™
documents containing software (based on a Microsoft Excel
spreadsheet) and an Application Note are available. Please order
DK305/D and DK306/D from the Motorola Literature Distribution Center.
• Low Power Supply Current of 5.8mA Typical for ICC and 0.7mA Typical
for IP
• Supply Voltage of 2.7 to 5.5V
• Dual Modulus Prescaler With Selectable Divide Ratios of 64/65 or
128/129
• On–Chip Reference Oscillator/Buffer
• Programmable Reference Divider Consisting of a Binary 14–Bit
Programmable Reference Counter
• Programmable Divider Consisting of a Binary 7–Bit Swallow Counter
and an 11–Bit Programmable Counter
• Phase/Frequency Detector With Phase Conversion Function
• Balanced Charge Pump Outputs
• Dual Internal Charge Pumps for Bypassing the First Stage of the Loop
Filter to Decrease Lock Time
• Outputs for External Charge Pump
• Operating Temperature Range of –40°C to +85°C
• Space Efficient Plastic Surface Mount SOIC or TSSOP Packages
• The MC12202 Is Pin Compatible With the Fujitsu MB1502 or MB1511
MC12202
MECL PLL COMPONENTS
Serial Input PLL
Frequency Synthesizer
16
1
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
16
1
M SUFFIX
PLASTIC SOIC PACKAGE
CASE 966–01
20
1
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948E–02
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
Power Supply Voltage, Pin 4 (Pin 5 in 20–lead package)
–0.5 to +6.0
VDC
VP Power Supply Voltage, Pin 3 (Pin 4 in 20–lead package)
Tstg Storage Temperature Range
VCC to +6.0
–65 to +150
VDC
°C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
MOSAIC V, Mfax and InterActiveApNote are trademarks of Motorola, Inc.
1/97
© Motorola, Inc. 1997
1
REV 4
1 page  
MC12202
PROGRAMMABLE DIVIDER
19–bit serial data format for the programmable divider is shown below. If the control bit is LOW, data is transferred from the 18–bit
shift register into the 18–bit latch which specifies the swallow A–counter divide ratio (0 to 127) and the programmable N–counter
divide ratio (16 to 2047). An N–counter divide ratio less than 16 is prohibited.
For Control bit (C) = LOW:
MSB (FIRST BIT)
CONTROL BIT (LAST BIT)
LSB
NNNNNNNNNNNAAAAAAAC
18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
SETTING BITS FOR
DIVIDE RATIO OF
PROGRAMMABLE N–COUNTER
SETTING BITS FOR
DIVIDE RATIO OF
SWALLOW A–COUNTER
DIVIDE RATIO OF PROGRAMMABLE N–COUNTER
DIVIDE RATIO OF SWALLOW A–COUNTER
Divide N N N N N N N N N N N Divide A A A A A A A
Ratio N 18 17 16 15 14 13 12 11 10 9 8 Ratio A 7 6 5 4 3 2 1
16 0 0 0 0 0 0 1 0 0 0 0
0 0000000
17 0 0 0 0 0 0 1 0 0 0 1
1 0000001
• ••••••••••• • •••••••
2047 1 1 1 1 1 1 1 1 1 1 1
127 1 1 1 1 1 1 1
DIVIDE RATIO SETTING
fvco = [(P•N)+A]•fosc ÷ R with A<N
fvco: Output frequency of external voltage controlled oscillator (VCO)
N: Preset divide ratio of binary 11–bit programmable counter (16 to 2047)
A: Preset divide ratio of binary 7–bit swallow counter (0 to 127, A<N)
fosc: Output frequency of the external frequency oscillator
R: Preset divide ratio of binary 14–bit programmable reference counter (8 to 16383)
P: Preset mode of dual modulus prescaler (64 or 128)
DATA
CLK
N18:MSB
(SW:MSB)
N17
(R14)
N8 A7
(R7) (R6)
A1 C = CONTROL BIT (LAST BIT)
(R1) (C = CONTROL BIT (LAST BIT))
LE
ts(C→LE)
ts(D) th(D) tCW
NOTES:Programmable reference divider data shown in parenthesis. Data shifted into register on rising edge of CLK.
ts(D) = Setup Time DATA to CLK
th(D) = Hold Time DATA to CLK
tCW = CLK Pulse Width
tEW = LE Pulse Width
ts(C→LE) = Setup Time CLK to LE
ts(D) ≥ 10ns
th(D) ≥ 20ns
tCW ≥ 30ns
tEW ≥ 20ns
ts(C→LE) ≥ 30ns
Figure 2. Serial Data Input Timing
HIPERCOMM
BR1334 — Rev 4
5
tEW
MOTOROLA
5 Page 
MC12202
–A
–
16
1
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
9
–B
–
8
P 8 PL
0.25 (0.010) M
BM
–T
SEAT–ING
PLANE
G
K
C
D 16 PL
0.25 (0.010) M T B S A S
M
R X 45°
F
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC
0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0° 7° 0° 7°
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019
16
1
Z
D
e
b
0.13 (0.005) M
M SUFFIX
PLASTIC SOIC PACKAGE
CASE 966–01
ISSUE O
9
E HE
8
LE
M_
Q1
L
DETAIL P
VIEW P
A
c
A1
0.10 (0.004)
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5 THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A --- 2.05 --- 0.081
A1 0.05 0.20 0.002 0.008
b 0.35 0.50 0.014 0.020
c 0.18 0.27 0.007 0.011
D 9.90 10.50 0.390 0.413
E 5.10 5.45 0.201 0.215
e 1.27 BSC
0.050 BSC
HE 7.40 8.20 0.291 0.323
L 0.50 0.85 0.020 0.033
LE 1.10 1.50 0.043 0.059
M 0 _ 10 _ 0 _ 10 _
Q1 0.70 0.90 0.028 0.035
Z --- 0.78 --- 0.031
HIPERCOMM
BR1334 — Rev 4
11
MOTOROLA
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MC12202D.PDF ] | |
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