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PDF MC10H680 Data sheet ( Hoja de datos )

Número de pieza MC10H680
Descripción 4-Bit Differential ECL Bus/TTL Bus Transceciver
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MC10H680, MC100H680
4−Bit Differential ECL Bus
to TTL Bus Transceiver
Description
The MC10H/100H680 is a dual supply 4bit differential ECL bus to
TTL bus transceiver. It is designed to allow the system designer to no
longer be limited in bus speed associated with standard TTL busses.
Using a differential ECL Bus will increase the frequency of operation
and increase noise immunity.
Both the TTL and the ECL ports are capable of driving a bus. The
ECL outputs have the ability to drive 25 W, allowing both ends of the
bus line to be terminated in the characteristic impedance of 50 W. The
TTL outputs are specified to source 15 mA and sink 48 mA, allowing
the ability to drive highly capacitive loads.
The ECL output levels are VOH approximately equal to 1.0 V and
VOL cutoff equal to 2.0 V (VTT). When the ECL ports are disabled
both EIOx and EIOxB go to the VOL cutoff level. The ECL input
receivers have special circuitry which detects this disabled condition,
prevents oscillation, and forces the TTL output to the low state. The
noise margin in this disabled state is greater than 600 mV. Multiple
ECL VCCO pins are utilized to minimize switching noise.
The TTL ports have standard levels. The TTL input receivers have
PNP input devices to significantly reduce loading. Multiple TTL
power and ground pins are utilized to minimize switching noise.
The control pins (EDIR and ECEB) of the 10H version is
compatible with MECL 10HECL logic levels. The control pins of
the 100H version are compatible with 100K levels.
Features
Differential ECL Bus (25 W) I/O Ports
High Drive TTL Bus I/O Ports
Extra TTL and ECL Power/Ground Pins to Minimize
Switching Noise
Dual Supply
Direction and Chip Enable Control Pins
PbFree Packages are Available*
http://onsemi.com
PLCC28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
MCxxxH680G
AWLYYWW
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = PbFree Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 Rev. 11
1
Publication Order Number:
MC10H680/D

1 page




MC10H680 pdf
MC10H680, MC100H680
Table 9. ECL TO TTL DIRECTION / AC TEST
Symbol
Parameter
Waveforms
Condition
TA = 0°C
Min Max
TA = 25°C
Min Max
TA = 75°C
Min Max
Unit
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation Delay
to Output
ECEB to Output
Enable Time
ECEB to Output
Disable Time
2, 4
2, 5, 6
2, 5, 6
CL = 50 pF
CL = 50 pF
CL = 50 pF
2.7 4.8 2.7 4.8 2.7 4.8 ns
3.5 6.5 3.5 6.5 3.7 6.7 ns
3.5 6.0 3.5 6.0 3.7 6.4
3.5 8.6 3.5 8.6 3.7 8.8 ns
3.5 6.5 3.5 6.5 3.7 7.3
tPZH
tPZL
TCEB to Output
Enable Time
2, 5, 6
CL = 50 pF
5.7 7.7 5.7 7.7 5.9 7.9 ns
5.4 6.9 5.4 6.9 5.9 7.4
tPHZ
tPLZ
TCEB to Output
Disable Time
2, 5, 6
CL = 50 pF
4.0 8.5 4.1 8.4 4.2 8.3 ns
4.0 5.8 4.2 6.0 4.7 6.5
tr/tf 1.0 to 2.0 Vdc
3
CL = 50 pF
0.4 1.5 0.4 1.5 0.4 1.5 ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Table 10. TTL TO ECL DIRECTION / AC TEST
Symbol
Parameter
Waveforms
Condition
TA = 0°C
Min Max
TA = 25°C
Min Max
TA = 75°C
Min Max
Unit
tPLH Propagation Delay
tPHL
to Output
1, 4
25 W to 2.0 V
1.8 4.6 1.8 4.6 2.0 4.9 ns
tPLH
tPHL
ECEB
to Output
1, 4
25 W to 2.0 V
2.9 5.1 3.0 5.2 3.4 5.7 ns
tPLH
tPHL
TCEB
to Output
1, 4
25 W to 2.0 V
3.4 6.3 3.5 6.6 3.8 7.4 ns
tr/tf Output Rise/Fall
1, 3
25 W to 2.0 V
1.0 3.4 1.0 3.4 1.0 3.4 ns
Time 20% 80%
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
http://onsemi.com
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