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PDF MC10H121P Data sheet ( Hoja de datos )
| Número de pieza | MC10H121P | |
| Descripción | 4-Wide OR-AND/OR-AND Gate | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
4-Wide OR-AND/OR-AND Gate
The MC10H121 is a basic logic building block providing the simultaneous
OR–AND/OR–AND–Invert function, useful in data control and digital
multiplexing applications. This MECL 10H part is a functional/pinout duplication
of the standard MECL 10K family part, with 100% improvement in propagation
delay, and no increase in power– supply current.
• Propagation Delay, 1.0 ns Typical
• Power Dissipation 100 mW/Gate Typical (same as MECL 10K)
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current — Continuous
— Surge
VEE
VI
Iout
–8.0 to 0
0 to VEE
50
100
Vdc
Vdc
mA
Operating Temperature Range
Storage Temperature Range — Plastic
— Ceramic
TA
0 to +75
°C
Tstg
–55 to +150
°C
–55 to +165
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0° 25° 75°
Characteristic
Symbol Min Max Min Max Min Max Unit
Power Supply Current
Input Current High
Pins 3, 4, 5, 6, 7, 9
11, 12, 13, 14, 15
Pin 10
IE
IinH
— 29 — 26 —
— 500 — 295 —
— 610 — 360 —
29 mA
µA
295
360
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
AC PARAMETERS
IinL
VOH
VOL
VIH
VIL
0.5 — 0.5 — 0.3
—
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45
µA
Vdc
Vdc
Vdc
Vdc
Propagation Delay
Pin 10 Only
Exclude Pin 10
tpd ns
0.45 1.8 0.45 1.8 0.55 2.2
0.55 1.95 0.6 2.0 0.7 2.4
Rise Time
tr 0.5 1.7 0.5 1.8 0.5 1.9 ns
Fall Time
tf 0.5 1.7 0.5 1.8 0.5 1.9 ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
MC10H121
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
4
5
6
7
9
10
11
12
13
14
15
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
2
3
DIP
PIN ASSIGNMENT
VCC1
AOUT
AOUT
A1IN
A1IN
A1IN
A2IN
VEE
1
2
3
4
5
6
7
8
16 VCC2
15 A4IN
14 A4IN
13 A4IN
12 A3IN
11 A3IN
10 A2IN, A3IN
9 A2IN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
2–226
REV 5
1 page | ||
| Páginas | Total 3 Páginas | |
| PDF Descargar | [ Datasheet MC10H121P.PDF ] | |
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