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PDF LMS75LBC176 Data sheet ( Hoja de datos )
| Número de pieza | LMS75LBC176 | |
| Descripción | Differential Bus Transceivers | |
| Fabricantes | National Semiconductor | |
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April 2003
LMS75LBC176
Differential Bus Transceivers
General Description
The LMS75LBC176 is a differential bus/line transceiver de-
signed for bidirectional data communication on multipoint
bus transmission lines. It is designed for balanced transmis-
sion lines. It meets TIA/EIA RS485 and ISO 8482:1987(E).
The LMS75LBC176 combines a TRI-STATE™ differential
line driver and differential input receiver, both of which oper-
ate from a single 5.0V power supply. The driver and receiver
have an active high and active low enable, respectively, that
can be externally connected to function as a direction con-
trol. The driver and receiver differential inputs are internally
connected to form differential input/output (I/O) bus ports
that are designed to offer minimum loading to bus whenever
the driver is disabled or when VCC = 0V. These ports feature
wide positive and negative common mode voltage ranges,
making the device suitable for multipoint applications in
noisy environments. The LMS75LBC176 is available in a
8-Pin SOIC package. It is a drop-in socket replacement to
TI’s SN75LBC176.
Features
n Bidirectional transceiver
n Meet ANSI standard RS-485
n Low skew, 6ns
n Low supply current, 8mA (max)
n Wide input and output voltage range
n High output drive capacity ±60mA
n Thermal shutdown protection
n Open circuit fail-safe for receiver
n Receiver input sensitivity ±200mV
n Receiver input hysteresis 10mV (min.)
n Single supply voltage operation, 5V
n Glitch free power-up and power-down operation
n Pin and functional compatible with TI’s SN75LBC176
n 8-Pin SOIC
Applications
n Network hubs, bridges, and routers
n Point of sales equipment (ATM, barcode readers,…)
n Industrial programmable logic controllers
n High speed parallel and serial applications
n Multipoint applications with noisy environment
Typical Application
20047901
A typical multipoint application is shown in the above figure. Terminating resistors, RT, are typically required but only located at the two ends of the cable.
Pull up and pull down resistors maybe required at the end of the bus to provide failsafe biasing. The biasing resistors provide a bias to the cable when all
drivers are in TRI-STATE, See National Application Note, AN-847 for further information.
© 2003 National Semiconductor Corporation DS200479
www.national.com
1 page  
Electrical Characteristics (Continued)
VCC = 5V, TA = 0˚C to 70˚C
Symbol
Parameter
Conditions
tPZH Output Enable Time to High
Level
tPZL Output Enable Time to Low
Level
tPHZ Output Disable Time from
High Level
tPLZ Output Disable Time from
Low Level
Min
Typ
Max
Units
35 ns
30 ns
35 ns
30 ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Note 2: All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.
Note 3: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD =
(TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 4: ESD rating based upon human body model, 100pF discharged through 1.5kΩ.
Note 5: Voltage limits apply to DI, DE, RE pins.
Note 6: Differential input/output bus voltage is measured at the non-inverting terminal A with respect to the inverting terminal B
Note 7: ∆VOD| and |∆VOC| are changes in magnitude of VOD and VOC , respectively when the input changes from high to low levels.
Note 8: Applies to both power on and off (ANSI Standard RS-485 conditions)|.
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