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PDF LMC555 Data sheet ( Hoja de datos )
| Número de pieza | LMC555 | |
| Descripción | CMOS Timer | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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LMC555
November 8, 2010
CMOS Timer
General Description
The LMC555 is a CMOS version of the industry standard 555
series general purpose timers. In addition to the standard
package (SOIC, MSOP, and MDIP) the LMC555 is also avail-
able in a chip sized package (8 Bump micro SMD) using
National's micro SMD package technology. The LMC555 of-
fers the same capability of generating accurate time delays
and frequencies as the LM555 but with much lower power
dissipation and supply current spikes. When operated as a
one-shot, the time delay is precisely controlled by a single
external resistor and capacitor. In the stable mode the oscil-
lation frequency and duty cycle are accurately set by two
external resistors and one capacitor. The use of National
Semiconductor's LMCMOS™ process extends both the fre-
quency range and low supply capability.
Features
■ Less than 1 mW typical power dissipation at 5V supply
■ 3 MHz astable frequency capability
■ 1.5V supply operating voltage guaranteed
■ Output fully compatible with TTL and CMOS logic at 5V
supply
■ Tested to −10 mA, +50 mA output current levels
■ Reduced supply current spikes during output transitions
■ Extremely low reset, trigger, and threshold currents
■ Excellent temperature stability
■ Pin-for-pin compatible with 555 series of timers
■ Available in 8-pin MSOP Package and 8-Bump micro SMD
package
Pulse Width Modulator
866920
866915
Ordering Information
Package
Temperature Range
Package
Marking
Industrial
−40°C to +85°C
8-Pin Small Outline (SO)
LMC555CM
LMC555CMX
LMC555CM
8-Pin Mini Small Outline
(MSOP)
LMC555CMM
LMC555CMMX
ZC5
8-Pin Molded Dip (MDIP)
LMC555CN
LMC555CN
8-Bump micro SMD
NOPB
LMC555CTP
LMC555CTPX
F02
Transport Media
Rails
2.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
Rails
250 Units Tape and Reel
3k Units Tape and Reel
NSC Drawing
M08A
MUA08A
N08E
TPA08FGA
Note: See Mil-datasheet MNLMC555-X for specifications on the military device LMC555J/883.
LMCMOS™ is a trademark of National Semiconductor Corp.
© 2010 National Semiconductor Corporation 8669
www.national.com
1 page  
Application Information
MONOSTABLE OPERATION
In this mode of operation, the timer functions as a one-shot
(Figure 1). The external capacitor is initially held discharged
by internal circuitry. Upon application of a negative trigger
pulse of less than 1/3 VS to the Trigger terminal, the flip-flop
is set which both releases the short circuit across the capac-
itor and drives the output high.
cuit so long as the trigger input is returned high at least 10µs
before the end of the timing interval. However the circuit can
be reset during this time by the application of a negative pulse
to the reset terminal. The output will then remain in the low
state until a trigger pulse is again applied.
When the reset function is not use, it is recommended that it
be connected to V+ to avoid any possibility of false triggering.
Figure 3 is a nomograph for easy determination of RC values
for various time delays.
Note: In monstable operation, the trigger should be driven high before the
end of timing cycle.
FIGURE 1. Monostable (One-Shot)
866904
The voltage across the capacitor then increases exponential-
ly for a period of tH = 1.1 RAC, which is also the time that the
output stays high, at the end of which time the voltage equals
2/3 VS. The comparator then resets the flip-flop which in turn
discharges the capacitor and drives the output to its low state.
Figure 2 shows the waveforms generated in this mode of op-
eration. Since the charge and the threshold level of the com-
parator are both directly proportional to supply voltage, the
timing internal is independent of supply.
FIGURE 3. Time Delay
866911
ASTABLE OPERATION
If the circuit is connected as shown in Figure 4 (Trigger and
Threshold terminals connected together) it will trigger itself
and free run as a multivibrator. The external capacitor
charges through RA + RB and discharges through RB. Thus
the duty cycle may be precisely set by the ratio of these two
resistors.
VCC = 5V
TIME = 0.1 ms/Div.
RA = 9.1 kΩ
C = 0.01 µF
Top Trace: Input 5 V/Div.
866910
Middle Trace: Output 5 V/Div.
Bottom Trace: Capacitor Voltage 2 V/Div.
FIGURE 2. Monostable Waveforms
Reset overrides Trigger, which can override threshold. There-
fore the trigger pulse must be shorter than the desired tH. The
minimum pulse width for the Trigger is 20ns, and it is 400ns
for the Reset. During the timing cycle when the output is high,
the further application of a trigger pulse will not effect the cir-
866905
FIGURE 4. Astable (Variable Duty Cycle Oscillator)
In this mode of operation, the capacitor charges and dis-
charges between 1/3 VS and 2/3 VS. As in the triggered mode,
the charge and discharge times, and therefore the frequency
are independent of the supply voltage.
5 www.national.com
5 Page 
Notes
11 www.national.com
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LMC555.PDF ] | |
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