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PDF LM9832CCVJD Data sheet ( Hoja de datos )
| Número de pieza | LM9832CCVJD | |
| Descripción | LM9832 42-Bit Color / 1200dpi USB Image Scanner | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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April 2000
N
LM9832 42-Bit Color, 1200dpi USB Image Scanner
General Description
Features
The LM9832 is a complete USB image scanner system on a sin-
gle IC. The LM9832 provides all the functions (image sensor
control, illumination control, analog front end, pixel processing
function image data buffer/DRAM controller, microstepping
motor controller, and USB interface) necessary to create a high
performance color scanner. The LM9832 scans images in 42 bit
color/14 bit gray, and has output data formats for 42 and 24 bit
color/14 and 8 bit gray. The LM9832 supports sensors with pixel
counts of up to 16384 pixels x 3 colors (1200 dpi x 13.6 inches).
The LM9832’s low operating and suspend mode supply currents
allow design of USB bus-powered scanners. The only additional
active components required are an external 4Mbit or 16Mbit
DRAM for data buffering and power transistors for the stepper
motor.
Applications
• Color Flatbed Document Scanners
• Color Sheetfed Document Scanners
Key Specifications
• Analog to Digital Converter Resolution
14 Bits
• Maximum Pixel Conversion Rate
6MHz
• A4 Color 150dpi scan time
<10 seconds
• A4 Color 300dpi scan time
<40 seconds
• A4 Color 600dpi scan time
<160 seconds
• Supply Voltage
- LM9832
+4.75V to +5.25V
- LM9832 DRAM I/O
+2.85 to +5.25V
• Maximum Operating Current Consumption
136mA
• Maximum Suspend Current Consumption
175µA
• 14 bit ADC digitizes at up to 6Mpixels/s (2M RGB pixels/sec).
• Digital Pixel Processing provides 1200, 800, 600, 400, 300,
200, 150, and 100dpi horizontal resolution from a 1200dpi
sensor and 600, 400, 300, 200, 150, 100, 75, and 50dpi
horizontal resolution from a 600dpi sensor.
• Provides 50-2400dpi vertical resolution in 1 dpi increments.
• Pixel rate error correction for gain (shading) and offset errors.
• Supports 4 or 16Mbit external DRAMs.
• Multiple CCD clocking rates allows matching of CCD clock to
scan resolution and pixel depth for maximum scan speed.
• Stepper motor control tightly coupled with image data buffer
management to maximize data transfer efficiency.
• PWM stepper motor current control allows microstepping for
the price of fullstepping.
• USB interface for Plug and Play operation on USB-equipped
computers.
• Serial EEPROM option for custom Vendor and Product IDs.
• Support for USB bus-powered operation.
• Pixel depths of 1, 2, or 4 bits are packed into bytes for faster
scans of line art and low pixel depth images.
• Supports 3 channel CCDs and 1 channel CIS sensors.
• 3 (R, G, and B) 12-bit, user-programmable gamma correction
tables.
• Compatible with a wide range of color linear CCDs and
Contact Image Sensors (CIS).
• Operates with 48MHz external crystal.
• Internal bandgap voltage reference.
• 100 pin TQFP package
LM9832 Scanner System Block Diagram
CCD/CIS
Illumination
USB
Port
Optional Serial
EEPROM
22
8 MISC
1-3 I/O
2-6 LM9832CCVJD
1-3 30 DRAM
+12V
Stepper
Motor
Power
Transistors
Ordering Information
48MHz Crystal
Commercial (0°C ≤ TA ≤ +70°C)
Package
LM9832CCVJD
VJD100A 100 Pin Thin Quad Flatpac
©2000 National Semiconductor Corporation
1
www.national.com
1 page  
Absolute Maximum Ratings (Notes 1 & 2)
Positive Supply Voltage (V+=VA=VD=VDRAM)
With Respect to GND=AGND=DGND
6.5V
Voltage On Any Input or Output Pin
-0.3V to V++0.3V
Input Current at any pin (Note 3)
±25mA
Package Input Current (Note 3)
±50mA
Package Dissipation at TA = 25°C
ESD Susceptibility (Note 5)
(Note 4)
Human Body Model
2000 V
Machine Model
250 V
Soldering Information
Infrared, 10 seconds (Note 6)
235°C
Storage Temperature
-65°C to +150°
Operating Ratings (Notes 1 & 2)
Operating Temperature Range
TMIN≤TA≤TMAX
LM9832VJD
0°C≤TA≤+70°C
VA Supply Voltage
+4.75V to +5.25V
VD Supply Voltage
+4.75V to +5.25V
VDRAM Supply Voltage
+2.85V ≤ VDRAM ≤ VD+100mV
|VA-VD|
Input Voltage Range
≤ 100mV
-0.05V to V+ + 0.05V
Electrical Characteristics
The following specifications apply for AGND=DGND=0V, VA=VD=VDRAM=+5.0VDC, fCRYSTAL IN= 48MHz, Analog Bias Current =
100%, unless otherwise noted. Boldface limits apply for TA=TJ=TMIN to TMAX; all other limits TA=TJ=25°C. (Notes 8, 9, & 10)
Symbol
Parameter
Conditions
Typical
(Note 9)
Limits
Units
(Note 10) (Limits)
Full Channel Characteristics (in units of 12 bit LSBs unless otherwise noted)
Resolution with No Missing Codes
14 12 bits (min)
DNL
INL
C
Differential Non-Linearity
(Note 14)
Integral Non-Linearity Error
(Notes 11 & 14)
Analog Channel Gain Constant
(ADC Codes/V), referred to 14 bits.
Bias Current = 80%,
VDRAM=3.3V
Bias Current = 80%,
VDRAM=3.3V
Includes voltage reference
variation, gain setting = 1
-0.45
+0.75
-2.3
+1.7
8192
-0.9
+2.4
-8.5
+7.5
7412
9300
LSB (min)
LSB (max)
LSB (min)
LSB (max)
LSB (min)
LSB (max)
VOS1 Pre-Boost Analog Channel Offset Error
26
-34 mV (min)
+76 mV (max)
VOS2 Pre-PGA Analog Channel Offset Error
-30
-80 mV (min)
+31 mV (max)
VOS3 Post-PGA Analog Channel Offset Error
-26
-75 mV (min)
+26 mV (max)
Coarse Color Balance PGA Characteristics (Configuration Registers 3B, 3C, and 3D)
Monotonicity
5 bits (min)
G0 (Minimum PGA Gain)
PGA Setting = 0
0.93
0.90
0.96
V/V (min)
V/V (max)
G31 (Maximum PGA Gain)
PGA Setting = 31
3.00
2.95
3.05
V/V (min)
V/V (max)
x3 Boost Gain
x3 Boost Setting On
(bit B5 of Gain Register is set)
2.94
2.85
3.04
V/V (min)
V/V (max)
Gain Error at any gain (Note 13)
0.3
-0.6
+0.9
% (min)
% (max)
Static Offset DAC Characteristics (Configuration Registers 38, 39, and 3A)
Monotonicity
6 bits (min)
Offset DAC LSB size
PGA gain = 1
9
6 mV (min)
12 mV (max)
Offset DAC Adjustment Range
PGA gain = 1
±278
±256 mV (min)
5 www.national.com
5 Page 
LM9832 Register Listing (Continued)
Address
Function
DDDDDDDD
76543210
Value
COMMAND REGISTER
Command Register
This register is used to start and end a scan.
It is also used to home the sensor in a
flatbed scanner or eject the image in a
sheetfed scanner. Note: Always make sure
the Command Register is in the idle state
(=0) before issuing a new command.
07
Standby
When this bit is set the entire chip enters a
low power state.
Warning: A Standby command will stop
DRAM refresh.
Reset
Write a 1 then a 0 to reset the LM9832’s
state machines.
Warning: A Reset will stop DRAM refresh.
MASTER CLOCK DIVIDER
MCLK Divider
This register sets the master clock frequency
08 for the entire scanner.
fMCLK = 48MHz/MCLK_Divider
fADC = fMCLK/8
Idle - Stops motor (A, B, A, B = 0),
0 0 0 completes current line of data (if scanning).
Note: CCD/CIS clocks continue clocking.
High Speed Forward - Moves motor forward at a
0 0 1 speed determined by the Fast Feed Step Size
(registers 48 and 49).
High Speed Reverse - Moves motor backward at a
0 1 0 speed determined by the Fast Feed Step Size
(registers 48 and 49).
0
1
1
Start Scan - Resets the LM9832’s data pointers and
starts an image scan.
Programmed High Speed Forward - Moves motor
1
0
1
forward at a speed determined by the Fast Feed Step
Size (registers 48 and 49) for the number of lines
programmed in registers 4A and 4B.
Programmed High Speed Reverse - Moves motor
1
1
0
backward at a speed determined by the Fast Feed
Step Size (registers 48 and 49) for the number of lines
programmed in registers 4A and 4B.
0 Normal Operation
1 Low Power Standby Mode
0 Normal Operation
1 Resets the LM9832
0 0 0 0 0 0 ÷1.0
0 0 0 0 0 1 ÷1.5
0 0 0 1 1 0 ÷4
a a a a a a ÷ ((aaaaaa/2)+1)
1 1 1 1 1 0 ÷32.0
1 1 1 1 1 1 ÷32.5
11 www.national.com
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| PDF Descargar | [ Datasheet LM9832CCVJD.PDF ] | |
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