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Número de pieza LM9630SAMPLE-KIT
Descripción LM9630 100 x 128 / 580 fps Ultra Sensitive Monochrome CMOS Image Sensor
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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ADVANCE INFORMATION
May 2002
LM9630 100 x 128, 580 fps Ultra Sensitive Monochrome CMOS Image Sensor
General Description
The LM9630 is a high performance, low power, CMOS Active
Pixel Image Sensor capable of capturing monochrome images
at 580 frames per second.
In addition to the active pixel array, an on-chip 8 bit A/D conver-
tor, fixed pattern noise elimination circuits an d a video gain
amplifier are provided.
The integrated programmable timing and control circuit allows
the user maximum flexibility in adjusting integration time and
frame rate. Furthermore, a fast read out circuit is provided allow-
ing a full frame to read out on a single 8-bit digital data bus in
less than 2ms.
The sensor utilizes a patented pixel design that incorporates an
integrated electronic shutter. This together with its ultra high sen-
sitivity makes the LM9630 an ideal choice for low light imaging
applications or applications where images of fast moving objects
need to be captured with minimum motion blur.
Applications
f High Speed Motion Detection
f IR Imaging
f Low Light Imaging Applications
Features
f Electronic shutter with global reset & pixel exposure.
f Programmable analog video gain.
f Integrated 8 bit analog to digital conversion.
f Programmable integration time.
f Programmable frame rate.
f Master and slave mode of operation
f On chip black level compensation.
f Power down and low power modes.
f I2C compatible serial interface.
f 10 bit digital video port (8 data, vertical & horizontal sync).
f Power on reset with hardware and software override.
Key Specifications
Array Format
Total
Active
Effective Image Area
Total
Active
Optical Format
Pixel Size
Video Outputs
Frame Rate
Dynamic Range
Electronic Shutter
FPN
PRMU
Sensitivity
Fill Factor
Package
Single Supply
Power Consumption
Operating Temp
128H x 101V
118H x 96V
2.56 mm x 2.00 mm
2.36 mm x 1.92 mm
1/5”
20µm x 20µm
8 Bit Digital
580 frames per second
48 dB
Global Reset
0.5%
1.3%
22 Volt/lux.s
47%
32 CLCC
3.3V +/- 10%
110 mW
-40oC to 85 oC
Chip Block Diagram
mclk
reset
APS Array
Column CDS
Clock Gen Reset Gen
Offset
Register
Gain
Register
POR
Shift
Register
+
AMP
8 Bit A/D
Serial I/F
Register Bank
Digital
Image Data
Framer
sda
sclk
d[7:0]
hsync
vsync
©2002 National Semiconductor Corporation
Master Timer
www.national.com

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