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PDF LC8904Q Data sheet ( Hoja de datos )
| Número de pieza | LC8904Q | |
| Descripción | Digital Audio Interface Receiver | |
| Fabricantes | Sanyo | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LC8904Q (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
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Ordering number : EN*5014B
CMOS LSI
LC8904Q
Digital Audio Interface Receiver
Preliminary
Overview
The LC8904Q demodulates data transmitted between
digital audio equipment in the EIAJ format (CP-1201) to a
normal format signal synchronized with the receiving side
input signal.
Features
• Synchronizes with the transmitted EIAJ format signal
using a built-in PLL circuit.
• Modes are set up and codes are output according to
commands sent over a microprocessor interface.
— Input pin and output data format setup
— Selection of digital source mode or analog source
mode
— 32-bit channel status output (consumer product
mode 0)
— 80-bit subcode Q data output (CRC check included)
• Either a 384fs or a 512fs clock can be selected as the
system clock.
• Provides 256fs, 128fs, BCLK, and LRCK clock outputs.
• Implements a CD subcode interface (CP-2401) using
user bits.
• Fabricated in a CMOS single-voltage power supply
process
• Package: QFP-48E
Package Dimensions
unit: mm
3156-QFP48E
[LC8904Q]
SANYO: QIP48E
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-0005 JAPAN
73096HA (OT) No. 5014-1/20
1 page  
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Input and output voltage
Operating temperature
Storage temperature
Symbol
VDD max
VI · VO
Topr
Tstg
LC8904Q
Conditions
Allowable Operating Ranges
Parameter
Supply voltage
Symbol
VDD
Conditions
Electrical Characteristics
DC Characteristics at Ta = –30 to +75°C, VDD = 4.5 to 5.5 V
Parameter
Symbol
Conditions
Input high-level voltage
VIH1
*1
Input low-level voltage
VIL1
*1
Input high-level voltage
VIH2
*2
Input low-level voltage
VIL2
*2
Input high-level voltage
VIH3
*3
Input low-level voltage
VIL3
*3
Output high-level voltage
VOH
IOH = –1 µA
Output low-level voltage
VOL IOL = 1 µA
Current drain
IDD *4
Input amplitude
VPP *5
Note: 1. Input pins other than DIN1, DIN2, DIN3, DIN4, RC1, and XMODE. TTL compatible.
2. The XIN pin. CMOS compatible.
3. The XMODE and RC1 pins. CMOS Schmitt compatible.
4. VDD = 5.0 V, Ta = 25°C, and input data with an fs of 48 kHz.
5. Conditions prior to the capacitances of the DIN1, DIN2, DIN3, and DIN4 pins.
Ratings
–0.3 to +7.0
–0.3 to VDD + 0.3
–30 to +75
–55 to +125
Unit
V
V
°C
°C
min typ max Unit
4.5 5.0 5.5 V
min
2.2
–0.3
0.7 VDD
–0.3
0.8 VDD
–0.3
VDD – 0.05
0.4
typ max Unit
VDD + 0.3
+0.8
V
V
VDD + 0.3
0.3 VDD
VDD + 0.3
0.2 VDD
V
V
V
V
V
VSS + 0.05 V
30 45 mA
VDD + 0.3
V
No. 5014-5/20
5 Page 
LC8904Q
No. 5014-11/20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LC8904Q.PDF ] | |
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