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PDF LA7583 Data sheet ( Hoja de datos )
| Número de pieza | LA7583 | |
| Descripción | IF Signal Processing Circuit (A2C PLL VIF + SIF) for TVs and VCRs | |
| Fabricantes | Sanyo | |
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Ordering number: EN5177
Monolithic Linear IC
LA7583
IF Signal Processing Circuit
(A2C PLL VIF + SIF) for TVs and VCRs
Overview
The LA7583 is a VIF + SIF IC that requires no adjustments. In
order to eliminate the need for adjustments in the VIF block, a
multi-network PLL has been developed and adopted for video
detection. In the SIF block, adjustments were eliminated by
using gyrator technology in the FM quadrature detector. In
addition to eliminating the need for adjustments, a buzz
canceller that suppresses Nyquist buzz has been built into the
LA7583 in order to provide excellent sound quality.
Package Dimensions
unit : mm
3067-DIP24S
[LA7583]
Features
. Elimination of VCO, AFT, and SIF coils eliminates the need
for adjustments.
. A variety of built-in filters.
. Built-in buzz canceller results in excellent audio
characteristics.
Note: A2C Automatic Adjustment Control
AQT Automatic Quadrature Tuning
Functions
[VIF]
. VIF amplifier
. Equalizer amplifier
. AGC lag lead filter
.[1st SIF]
Preamplifier
.[SIF]
Limiter amplifier
.[mute]
Audio mute
. Multinetwork PLL
. AFT
. Video driver
. 1st SIF detector
. AQT detector (gyrator)
. AV mute
. BNC
. IFAGC
. AGC detector
. J/U switch
SANYO : DIP24S
. FAGC
. Buzz canceller
. Built-in AGC filter
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
83095HA(II) No.5177-1/15
1 page  
Equivalent Circuit Block Diagram
LA7583
Multinetwork PLL (Automatic Adjustment Control)
The LA7583’s PIF detector uses a multinetwork PLL and a buzz canceller. The multinetwork PLL is a PLL detector that was
developed in order to eliminate the need for adjustments in video detection.
This PLL detector offers the following features:
(1) Eliminates the need for adjustments in video detection.
(2) The PLL detection characteristics are unaltered.
a. Offers better waveform response characteristics in comparison with the quasi-synchronous detection method.
b. The harmonic wave component of the video signal (demodulated output) is reduced.
c. The 1/2 IF signal suppression ratio is improved.
(3) Audio buzz is greatly reduced by the buzz canceller.
A typical PLL detector consists of the blocks shown below.
In these blocks, if the VCO coil is not adjusted to the IF frequency, a phase difference will appear in the control loop. As a result,
the PLL detector detection axis will shift from the ideal 180 °. The group delay, DP characteristics, etc., deteriorate as a result.
No.5177-5/16
5 Page 
Continued from preceding page.
Pin
No.
Symbol
17 EQUALIZER INPUT
LA7583
Circuit Configuration
Description
Pin 17 is the equalizer amplifier input pin. A
signal which has passed through a 4.5 MHz
trap is input through pin 17 and is output
.through pin 19.
The input level of pin 17 is 1.5 Vp-p. This
is amplified 3 dB to 2 Vp-p by the
equalizer amplifier.
18 EQUALIZER FILTER
Pin 18 is the equalizer pin. The equalizer
amplifier is of the voltage follower type with
a voltage gain of 3 dB. To correct the
frequency characteristics, connect LCR
externally.
The operating characteristics are as follows:
Ve R1
Av = = 1 + (times)
Vi Z
19 EQUALIZER
OUTPUT
Pin 19 is the equalizer amplifier output pin.
This output has a built-in low-impedance
drive circuit.
Continued on next page.
No.5177-11/15
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet LA7583.PDF ] | |
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