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Número de pieza | PCF8533U | |
Descripción | Universal LCD driver for low multiplex rates | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
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No Preview Available ! INTEGRATED CIRCUITS
DATA SHEET
PCF8533
Universal LCD driver for low
multiplex rates
Product specification
Supersedes data of 1999 Mar 12
File under Integrated Circuits, IC12
1999 Jul 30
1 page Philips Semiconductors
Universal LCD driver for low multiplex rates
Product specification
PCF8533
5 PINNING
SYMBOL
SDAACK
SDA
SCL
CLK
VDD
SYNC
OSC
A0, A1 and A2
SA0
VSS
VLCD
BP0, BP1, BP2 and BP3
S0 to S79
PAD
1
2 and 3
4 and 5
6
7
8
9
10, 11 and 12
13
14
15
17, 99, 16 and 98
18 to 97
DESCRIPTION
I2C-bus acknowledge output; note 1
I2C-bus serial data input; note 1
I2C-bus serial clock input
external clock input/output
supply voltage
cascade synchronization input/output
internal oscillator enable input
subaddress inputs
I2C-bus slave address input; bit 0
logic ground
LCD supply voltage
LCD backplane outputs
LCD segment outputs
Note
1. For most applications SDA and SDAACK will be shorted together; see Chapter 7.
6 FUNCTIONAL DESCRIPTION
The PCF8533 is a versatile peripheral device designed to interface any microprocessor/microcontroller to a wide variety
of LCDs. It can directly drive any static or multiplexed LCD containing up to four backplanes and up to 80 segments.
The display configurations possible with the PCF8533 depend on the number of active backplane outputs required; a
selection of display configurations is given in Table 1.
All of the display configurations given in Table 1 can be implemented in the typical system shown in Fig.2.
The host microprocessor/microcontroller maintains the 2-line I2C-bus communication channel with the PCF8533.
The internal oscillator is selected by connecting pad OSC to VSS. The appropriate biasing voltages for the multiplexed
LCD waveforms are generated internally. The only other connections required to complete the system are to the power
supplies (VDD, VSS and VLCD) and the LCD panel selected for the application.
Table 1 Selection of display configurations
NUMBER OF
BACKPLANES SEGMENTS
4 320
3 240
2 160
1 80
7-SEGMENTS NUMERIC
DIGITS
40
30
20
10
INDICATOR
SYMBOLS
40
30
20
10
14-SEGMENTS
ALPHANUMERIC
CHARACTERS
INDICATOR
SYMBOLS
DOT MATRIX
20 40 320 dots (4 × 80)
16 16 240 dots (3 × 80)
10 20 160 dots (2 × 80)
5 10 80 dots (1 × 80)
1999 Jul 30
5
5 Page Philips Semiconductors
Universal LCD driver for low multiplex rates
Product specification
PCF8533
handbook, full pagewidth
BP0
BP1
BP2
Sn
Sn + 1
Sn + 2
VLCD
2VLCD/3
VLCD/3
VSS
VLCD
2VLCD/3
VLCD/3
VSS
VLCD
2VLCD/3
VLCD/3
VSS
VLCD
2VLCD/3
VLCD/3
VSS
VLCD
2VLCD/3
VLCD/3
VSS
VLCD
2VLCD/3
VLCD/3
VSS
state 1
VLCD
2VLCD/3
VLCD/3
0V
−VLCD/3
−2VLCD/3
−VLCD
state 2
VLCD
2VLCD/3
VLCD/3
0V
−VLCD/3
−2VLCD/3
−VLCD
Tframe
LCD segments
state 1
state 2
(a) Waveforms at driver.
(b) Resultant waveforms
at LCD segment.
MGL748
Vstate1(t) = Vsn(t) − VBP0(t).
Von(rms) = 0.638VLCD.
Vstate2(t) = Vsn(t) − VBP1(t).
Voff(rms) = 0.333VLCD.
Fig.6 Waveforms for the 1 : 3 multiplex drive mode.
6.4.4 1 : 4 MULTIPLEX DRIVE MODE
When four backplanes are provided in the LCD, the 1 : 4 multiplex drive mode applies, as shown in Fig.7.
1999 Jul 30
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet PCF8533U.PDF ] |
Número de pieza | Descripción | Fabricantes |
PCF8533 | Universal LCD driver for low multiplex rates | NXP Semiconductors |
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