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Número de pieza | UPC8104GR-E1 | |
Descripción | UP CONVERTER + QUADRATURE MODULATOR IC FOR DIGITAL MOBILE COMMUNICATION SYSTEMS | |
Fabricantes | NEC | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de UPC8104GR-E1 (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
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BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC8104GR
UP CONVERTER + QUADRATURE MODULATOR IC
FOR DIGITAL MOBILE COMMUNICATION SYSTEMS
DESCRIPTION
The µPC8104GR is a silicon monolithic integrated circuit designed as quadrature modulator for digital mobile
communication systems. This modulator consists of 1.9 GHz up-converter and 400 MHz quadrature modulator which
are packaged in 20 pin SSOP. The device has power save function and can operate 2.7 to 5.5 V supply voltage,
therefore, it can contribute to make RF block small, high performance and low power consumption.
FEATURES
• 20 pin SSOP suitable for high density surface mounting.
• High linearity up converter is incorporated; PRFout(sat) = −6 dBm TYP.
• Low phase difference due to digital phase shifter is adopted.
• Wide operating frequency range. Up converter; fRFout = 800 MHz to 1.9 GHz
Modulator ; fMODout = 100 MHz to 400 MHz, fI/Q = DC to 10 MHz
• External IF filter can be applied between modulator output and up converter input terminal.
• Supply voltage: VCC = 2.7 to 5.5 V
• Equipped with power save function.
APPLICATION
• Digital cordless phones
• Digital cellular phones
ORDERING INFORMATION
PART NUMBER
µPC8104GR-E1
PACKAGE
20 pin plastic SSOP
SUPPLYING FORM
Embossed tape 12 mm wide. QTY 2.5 kp/Reel.
Pin 1 indicates pull-out direction of tape.
* For evaluation sample order, please contact your local NEC sales office. (Order number: µPC8104GR)
Caution electro-static sensitive device
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P10099EJ4V0DS00 (4th edition)
Date Published October 1999 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1995, 1999
1 page µPC8104GR
PIN EXPLANATION
PIN ASSIGN- SUPPLY PIN
NO. MENT
VOL. (V) VOL.(V) FUNCTION AND APPLICATION
EQUIPMENT CIRCUIT
1 Lo1in
−
0 Lo1 input for phase shifter.
This input impedance is 50 Ω
matched internally.
1
50 Ω
2 Lo1in − 2.4 Bypass of Lo1 input.
This pin is grounded through
internal capacitor.
Open in case of single ended.
3 GND for
modulator
0
− Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
4
I
VCC/2
− Input for I signal. This input
impedance is larger than 20 kΩ.
Relations between amplitude
and VCC/2 bias of input signal
are following.
VCC/2 (v)
≥ 1.35
≥ 1.5
≥ 1.75
Amp. (mVp-p) Note
400
600
1000
4
5 I VCC/2
6 Q VCC/2
7 Q VCC/2
16 MODout
−
− Input for I signal. This input
impedance is larger than 20 kΩ.
VCC/2 biased DC signal should
be input.
− Input for Q signal. This input
impedance is larger than 20 kΩ.
VCC/2 biased DC signal should
be input.
− Input for Q signal. This input
impedance is larger than 20 kΩ.
Relations between amplitude
and VCC/2 bias of input signal
7
are following.
VCC/2 (v)
≥ 1.35
≥ 1.5
≥ 1.75
Amp. (mVp-p) Note
400
600
1000
1.5 Output from modulator.
This is emitter follower output.
16
2
5
6
Note In case of that I/Q input signals are single ended.
Of course, I/Q signal inputs can be used either single endedly or differentially with proper terminations.
Data Sheet P10099EJ4V0DS00
5
5 Page µPC8104GR
[MODULATOR BLOCK]
I/Q INPUT SIGNAL vs OUTPUT POWER,
LOCAL LEAK, IMAGE REJECTION,
I/Q 3RD ORDER INTERMODULATION
DISTORTION
10 –10
(PHS) 384 Kbps
RNYQ α = 0.5
(0000) All zero
0
–10 Pout –20
–20
–30
LOL (ISOLO)
–40
ImR
–50
–30
–40
–60
IM3I/Q
–70
0
0.5
PI/Qin - I/Q Input Signal - Vp-p
–50
1
[MODULATOR + UP CONVERTER]
I/Q INPUT SIGNAL vs VECTOR ERROR,
MAGNITUDE ERROR, PHASE ERROR
VCC = 3 V
Lo1: 240 MHz
10 –10 dBm
Lo2: 1 660 MHz
–8 dBm
I/Q DC 1 500 mV
AC
7 <PHS> 384 kbps
RNYQ α = 0.5
∆M PN9
5
∆A
3
2 ∆φ
1
0
0
500
1 000
1 500
PI/Qin - I/Q Input Signal - mVp-p
[MODULATOR BLOCK]
Lo1 INPUT FREQUENCY vs OUTPUT POWER,
LOCAL LEAK, IMAGE REJECTION, I/Q 3RD,
ORDER INTERMODULATION DISTORTION
–10 –10
–20
Pout
ImR
–30
–20
–30
–40
LOL (ISOLO)
–50
–60
IM3I/Q
–40
–50
–60
–70
50 100 200
500
–70
fLo1 - Lo1 Input Frequency - MHz
[MODULATOR BLOCK]
Lo1 INPUT FREQUENCY vs VECTOR ERROR,
MAGNITUDE ERROR, PHASE ERROR
VCC = 3 V
Lo1: 15 dBm
10 I/Q DC 1 500 mV
AC 430 mVp-p
<PHS> 384 kbps
RNYQ α = 0.5
PN9
7
5
3 ∆M
2 ∆A
∆φ
1
0
0 100 200 300 400 500
fLo1 - Lo1 Input Frequency - MHz
Data Sheet P10099EJ4V0DS00
11
11 Page |
Páginas | Total 20 Páginas | |
PDF Descargar | [ Datasheet UPC8104GR-E1.PDF ] |
Número de pieza | Descripción | Fabricantes |
UPC8104GR-E1 | UP CONVERTER + QUADRATURE MODULATOR IC FOR DIGITAL MOBILE COMMUNICATION SYSTEMS | NEC |
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