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Número de pieza | TLE5226G | |
Descripción | Smart Quad Channel Low-Side Switch | |
Fabricantes | Siemens Semiconductor Group | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TLE5226G (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
No Preview Available ! TLE 5226 G
Smart Quad Channel Low-Side Switch
Features
• Low ON-resistance 2 x 0.2 Ω , 2 x 0.35 Ω (typ.)
• Power - SO 20 - Package with integrated
cooling area
• Overload shutdown
• Selective thermal shutdown
• Status monitoring
• Overvoltage protection
• Shorted circuit protection
• Standby mode with low current consumption
• µC compatible input
• Electostatic discharge (ESD) protection
Product Summary
Supply voltage
Drain source voltage
On resistance
Output current
VS
VDS(AZ)max
RON(typ) 1,2
RON(typ) 3,4
ID 1,2
ID 3,4
4.8 - 32
60
0.2
0.35
2x5
2x3
V
V
Ω
Ω
A
A
Application
• All kinds of resistive and inductive loads (relays,electromagnetic valves)
• µC compatible power switch for 12 and 24 V applications
• Solenoid control switch in automotive and industrial control systems
P-DSO-20-10
General description
Quad channel Low-Side-Switch (2x5A/2x3A) in Smart Power Technology (SPT) with four seperate in-
puts and four open drain DMOS output stages. The TLE 5226 is fully protected by embedded protecti-
on functions and designed for automotive and industrial applications.
Pin Description
Pin Configuration (Top view)
Pin Symbol
Function
1 GND
Ground
2 OUT1
Power Output channel 1
3 ST1
Status Output channel 1
4 IN4
Control Input channel 4
5 VS
Supply Voltage
6 STBY
Standby
7 IN3
Control Input channel 3
8 ST2
Status Output channel 2
9 OUT2
Power Output channel 2
10 GND
Ground
11 GND
Ground
12 OUT3
Power Output channel 3
13 ST3
14 IN2
Status Output channel 3
Control Input channel 2
P - DSO - 20 - 10
15 GND
Ground Logic
16
ENA
Enable Input for all four channels
17 IN1
Control Input channel 1
18 ST4
Status Output channel 4
19 OUT4
Power Output channel 4
20 GND
Ground
Semiconductor Group
Page 1
1998-02-04
1 page TLE 5226 G
Electrical Characteristics
Parameter and Conditions
VS = 4.8 to 18 V ; Tj = - 40 °C to + 150 °C
(unless otherwise specified)
Symbol
1. Power Supply (VS)
Supply current (Outputs ON)
Supply current (Outputs OFF)
VENA = L, VSTBY = H
Operating voltage
Standby current
VSTBY = L
IS
IS
VS
IS
2. Power Outputs
ON state resistance Channel 1,2
ID = 1A; VS ≥ 9.5 V
Tj = 25 ° C
Tj = 125°C 1
ON state resistance Channel 3,4
ID = 1A; VS ≥ 9.5 V
Tj = 25 ° C
Tj = 125°C 1
Z-Diode clamping voltage (OUT1...4) ID ≥ 100 mA
Pull down resistor
VSTBY = H, VIN = L
Tj = 25 °C
T j = -40 °C ...150°C
Output leakage current
Output on delay time 2
Output off delay time 2
Output on fall time 2
Output off rise time 2
Output off status delay time 2
Output on status delay time 3
VSTBY = L
ID = 1 A
ID = 1 A
ID = 1 A
ID = 1 A
ID = 1 A
Overload switch-off delay time
RDS(ON)
RDS(ON)
VDS(AZ)
RPD
IDlk
ton
toff
tfall
trise
t4
t5
tDSO
3. Digital Inputs (IN1, IN2, IN3, IN4, ENA)
Input low voltage
Input high voltage
Input voltage hysteresis 3
Input pull down current
Enable pull down current
VIN = 5 V; VS ≥ 6.5 V
VENA = 5 V; VS ≥ 6.5 V
VINL
VINH
VINHys
IIN
IENA
4. Digital Status Outputs (ST1 - ST4) open Drain
Output voltage low
IST = 2 mA
Leakage current high
VSTL
ISTH
Values
min typ
Unit
max
8 mA
4 mA
4.8 32 V
10 µA
0.2
0.35
45
14 20
10
10
5
5
10
50 100
0.5
0.75
60
26
40
20
65
80
40
40
60
50
300
Ω
Ω
V
kΩ
µA
µs
- 0.3
2.0
50
10
10
100
30
20
1.0 V
6.0 V
mV
60 µA
40 µA
0.5 V
10 µA
1 Measured on P-DSO-20 devices
2 See timing diagram, resitive load condition; VS ≥ 9 V
3 This parameter will not be tested but assured by design
Semiconductor Group
Page
5
1998-02-04
5 Page Application Circuit
TLE 5226 G
The blocking capacitor C is recommended to avoid critical negative voltage spikes on VS in case of
battery interruption during OFF-commutation.
Semiconductor Group
Page 11
1998-02-04
11 Page |
Páginas | Total 13 Páginas | |
PDF Descargar | [ Datasheet TLE5226G.PDF ] |
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