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PDF TLE4214G Data sheet ( Hoja de datos )

Número de pieza TLE4214G
Descripción Intelligent Double Low-Side Switch 2 x 0.5 A
Fabricantes Siemens Semiconductor Group 
Logotipo Siemens Semiconductor Group Logotipo



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Intelligent Double Low-Side Switch 2 x 0.5 A
TLE 4214 G
Bipolar IC
Features
q Double low-side switch, 2 x 0.5 A
q Power limitation
q Overtemperature shutdown
q Overvoltage shutdown
q Status monitoring
q Shorted-load protection
q Integrated clamp diodes
q Temperature range – 40 to 125 °C
P-DSO-20-7
Type
TLE 4214 G
Ordering Code
Q67000-A9094
Package
P-DSO-20-7 (SMD)
Application
Applications in automotive electronics require intelligent power switches activated by
logic signals, which are shorted-load protected and provide error feedback.
This IC contains two of these power switches (low-side switches). In case of inductive
loads the integrated clamp diodes clamp the discharging voltage. If a “high” signal is
applied to the enable input both switches can be activated independently of one another
with TTL signals at the control inputs (active high). The high impedance inputs should
always be connected to a fixed potential (noise immunity).
The status output (open collector) signals the following malfunctions with high potential:
q Overload,
q Open load,
q Shorted load to ground,
q Overvoltage,
q Overtemperature.
Semiconductor Group
294
10.96

1 page




TLE4214G pdf
TLE 4214 G
Circuit Description
Input Circuits
The control inputs and the enable input consist of TTL-compatible Schmitt triggers with
hysteresis. Controlled by these stages the buffer amplifiers drive the NPN power
transistors.
Switching Stages
The output stages consist of NPN power transistors with open collectors. Since the
protective circuit allocated to each stage limits the power dissipation, the outputs are
shorted-load protected to the supply voltage throughout the entire operating range.
Positive voltage peaks, which occur during the switching of inductive loads, are limited
by the integrated clamp diodes.
Monitoring and Protective Functions
During the activated status the outputs are monitored for open load, overload, and
shorted load to ground (see table below). In addition, large sections of the circuit are shut
down in case of excessive supply voltages VS. Linked via OR gate the information
regarding these malfunctions effects the status output (open collector, active high). An
internally determined delay time applied to all malfunctions but overvoltage prevents the
output of messages in case of short-term malfunctions. Furthermore, a temperature
protection circuit prevents thermal overload. If overload occurs, the outputs are
protected according to the safe operating area (SOA) mode (see diagram). If voltage
and current are outside the SOA, the outputs oscillate to reduce the power dissipation.
The switching frequency depends on the internal delay time and the external load
(inductances and capacitances). If the frequency is low, the status output may follow the
oscillation. An integrated reverse diode protects the supply voltage VS against reverse
polarities. Similarly the load circuit is protected against reverse polarities within the limits
established by the maximum ratings (no shorted load at the same time!). At supply
voltages below the operating range an undervoltage detector ensures that neither the
status nor the outputs are activated. At supply voltages below the operating range the
output stages are de-activated.
Semiconductor Group
298

5 Page





TLE4214G arduino
TLE 4214 G
Characteristics (cont’d)
VS = 6 to 16 V (typ. VS = 12 V); Tj = – 40 to 150 °C (typ. Tj = 25 °C)
Parameter
Symbol Limit Values Unit Test Condition
min. typ. max.
Switching Stages
Saturation voltage
Saturation voltage
Output current
Leakage current
Switch-ON time
Switch-OFF time
Forward voltage of
substrate diode
Forward voltage of
clamp diode
Leakage current of
clamp diode
VQSat
VQSat
IQ
IQ
tD ON
tD OFF
VQS
VQF
IQF
– 0.6 0.8 V IQ = 0.5 A; VI > VIH;
VF > VFH
– 45 100 mV IQ = 50 mA; VI > VIH;
VF > VFH
0.5 –
–5 –
A VQSat = 0.8 V; VI > VIH
50 µA VQ = 6 V; VI < VIL
0.2 0.5 5
0.2 2 5
µs IQ = 0.5 A see Timing
µs IQ = 0.5 A Diagram
– 1.3 1.7 V IQ = – 0.5 A
t < 0.1 s
– 1.3 1.7 V IQ = 0.5 A
t < 0.1 s
––5
µA VQ = 0 V; VI < VIL
Semiconductor Group
304

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