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PDF TP3465 Data sheet ( Hoja de datos )
| Número de pieza | TP3465 | |
| Descripción | TP3465 MICROWIRETM Interface Device (MID) | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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July 1999
TP3465 MICROWIRE TM Interface Device (MID)
General Description
The MICROWIRETM Interface Device MID gives a general
microprocessor (such as National Series 32000 proces-
sors Intel 80C188 80C86 or 80286 Motorola 6800 and
68000 family of processors) the ability to communicate effi-
ciently with up to eight peripheral devices via the serial MI-
CROWIRE interface The MID causes each of the peripheral
devices to appear to the mP as memory mapped locations
by performing all the data serialization and transfer proto-
cols to and from the peripherals
Applications
Y ISDN Terminal Adapters
Y Digital Line cards (ISDN and Non ISDN)
Y Analog Linecards using National COMBO
Y Interfacing to industry standard serial EEPROMs
Y Interfacing to industry standard MICROWIRE peripheral
devices such as Analog to Digital Converters LCD driv-
ers clock generators
Features
Y Multiplexed and Non-multiplexed microprocessor bus
compatible
Y National Intel and Motorola microprocessor bus
compatible
Y Microprocessor Clock (CKIN) up to 20 MHz
Y MICROWIRE clock speeds up to 5 MHz
Y Directly compatible with 8- and 16-bit MICROWIRE
peripherals
Y Commercial temperature range 0C to +70C
Y TP3465 for 8 Chip Select output
Y Memory mapped peripherals
Y Programmable MICROWIRE Clock to communicate with
devices of different speeds
Y Operates as MICROWIRE bus master or slave
Y 28-pin PLCC Package
Y CMOS Low Power
Block Diagram
FIGURE 1 MICROWIRE Interface Device MID
COMBO Series 32000 and TRI-STATE are registered trademarks of National Semiconductor Corporation
MICROWIRETM is a trademark of National Semiconductor Corporation
C1999 National Semiconductor Corporation TL H 10803
TL H 10803 – 1
1 page  
Functional Description (Continued)
Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
Register
SMB
FMB
FMBD0
FMBD1
FMBD2
FMBD3
FMBD4
FMBD5
FMBD6
FMBD7
CS
SKP
MWM
SKR
ST
PD
Bit7
d7
d7
d7
d7
d7
d7
d7
d7
d7
d7
cs7
skp7
mwm7
inten
uwdone
pd7
TABLE I Control and Data Registers
Bit6 Bit5 Bit4 Bit3
d6 d5 d4 d3
d6 d5 d4 d3
d6 d5 d4 d3
d6 d5 d4 d3
d6 d5 d4 d3
d6 d5 d4 d3
d6 d5 d4 d3
d6 d5 d4 d3
d6 d5 d4 d3
d6 d5 d4 d3
cs6 cs5 cs4 cs3
skp6
skp5
skp4
skp3
mwm6
mwm5
mwm4
mwm3
soi ms
0
0
0000
pd6 pd5 pd4 pd3
Bit2
d2
d2
d2
d2
d2
d2
d2
d2
d2
d2
cs2
skp2
mwm2
div2
0
pd2
Bit1
d1
d1
d1
d1
d1
d1
d1
d1
d1
d1
cs1
skp1
mwm1
div1
0
pd1
Bit0
d0
d0
d0
d0
d0
d0
d0
d0
d0
d0
cs0
skp0
mwm0
div0
0
pd0
PD Pin Definition Register W Register
RESET condition is FFhex (all pins as Inputs)
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
pd7 pd6 pd5 pd4 pd3 pd2 pd1 pd0
pd0 – 7 bits configure the CS0–7 pins as inputs or outputs
For example pd0 e 1 sets the CS0 pin as an input pd0 e
0 sets CS0 pin as an output Upon chip RESET the pd0 –7
bits are set to 1
SKP MICROWIRE Clock (SK) Polarity W Register
RESET condition is 00hex (Normal MICROWIRE clock)
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
skp7 skp6 skp5 skp4 skp3 skp2 skp1 skp0
skp 0 – 7 bits set the polarity of the SK MICROWIRE clock
when communicating with device connected to each of the
pins CS0 – 7 For example skp0 e 0 normal MICROWIRE
mode (i e SO data output on negative edge of SK clock)
when sending data to device controlled by CS0 pin skp1 e
1 NSC COMBO II clock format for device controlled by CS1
(i e SO data output on the positive edge of SK clock)
MWM MICROWIRE Mode Register W Register
RESET condition is 00hex
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
mwm7 mwm6 mwm5 mwm4 mwm3 mwm2 mwm1 mwm0
mwm0 – 7 bits specify whether 8 or 16 clocks are generated
for devices connected to CS0 – 7 pins For example mwm1
e 1 16 clocks will be generated for device controlled by
CS1 (16 data bits will be shifted out and 16 data bits will be
strobed in) mwm0 e 0 8 clocks will be generated for de-
vice controlled by CS0 (8 data bits will be shifted out and
strobed in)
SKR MICROWIRE Clock (SK) Rate Register
W Register
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
inten soi ms 0
0 div2 div1 div0
The 3 bits div0 – 2 give the divide-by value for deriving the
SK clock output rate from the CKIN The maximum CKIN
rate is 20 MHz and the slowest MICROWIRE peripheral
works at 256 kHz Table 2 below gives the division ratios
and some examples
div2
0
0
0
0
1
1
1
1
div1
0
0
1
1
0
0
1
1
div0
0
1
0
1
0
1
0
1
SK Ratio
e g CKIN e 5 MHz
SK e CKIN
SK e CKIN 2
SK e CKIN 4
SK e CKIN 8
SK e CKIN 16
SK e CKIN 32
SK e CKIN 64
SK e CKIN 128
SK e 5 MHz
SK e 2 5 MHz
e 1 25 MHz
e 625 kHz
e 312 5 kHz
e 156 25 kHz
e 78 125 kHz
e 39 06 kHz
TABLE 2 SK Clock Rate Control
e g CKIN e 20 MHz
SK e 5 MHz
e 2 5 MHz
e 1 25 MHz
e 625 kHz
e 312 5 kHz
e 156 25 kHz
5
5 Page 
Applications (Continued)
The nomenclature for MICROWIRE signal names is as follows
MICROWIRE controller SK (clock) SO (data out) SI (data in)
MICROWIRE peripheral CCLK (clock) CO (data out) CI (data in)
FIGURE 6 Example of MID in Master or Slave MICROWIRE Operation
TL H 10803 – 6
TL H 10803 – 16
Note: For TP3465, the AS (Address Strobe) and DS (Data Strobe) are active high polarity signals. For non-multiplexed busses, AS = 0.
FIGURE 7 MID Connecting to Motorola mPs
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet TP3465.PDF ] | |
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