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PDF TP2540 Data sheet ( Hoja de datos )
| Número de pieza | TP2540 | |
| Descripción | P-Channel Enhancement-Mode Vertical DMOS FETs | |
| Fabricantes | Supertex Inc | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TP2540 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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TP2540
P-Channel Enhancement Mode
Vertical DMOS FETs
Features
► Low threshold (-2.4V max.)
► High input impedance
► Low input capacitance (125pF max.)
► Fast switching speeds
► Low on-resistance
► Free from secondary breakdown
► Low input and output leakage
Applications
► Logic level interfaces - ideal for TTL and CMOS
► Solid state relays
► Battery operated systems
► Photo voltaic drives
► Analog switches
► General purpose line drivers
► Telecom switches
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures,
this device is free from thermal runaway and thermally-
induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching
speeds are desired.
Ordering Information
Device
TO-92
Package Options
TO-243AA (SOT-89)
TP2540 TP2540N3-G
TP2540N8-G
-G indicates package is RoHS compliant (‘Green’)
* MIL visual screening available.
Die*
TP2540ND
BVDSS/BVDGS
(V)
-400
RDS(ON)
(max)
(Ω)
25
Pin Configurations
VGS(th)
(max)
(V)
-2.4
ID(ON)
(min)
(A)
-0.4
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSS
BVDGS
±20V
Operating and storage temperature
-55°C to +150°C
Soldering temperature*
+300°C
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
DRAIN
DRAIN
SOURCE
GATE
TO-92 (N3)
Product Marking
SOURCE
DRAIN
GATE
TO-243AA (SOT-89) (N8)
SiTP
2540
YYWW
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-92 (N3)
TP5DW
W = Code for week sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-243AA (SOT-89) (N8)
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
1 page  
3-Lead TO-92 Package Outline (N3)
D
Seating Plane
123
L
A
b
e1
e
Front View
c
Side View
E1
1
E
3
2
Bottom View
TP2540
Symbol
Ab
Dimensions
(inches)
MIN
NOM
MAX
.170
-
.210
.014†
-
.022†
JEDEC Registration TO-92.
* This dimension is not specified in the JEDEC drawing.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version E041009.
c
.014†
-
.022†
D
.175
-
.205
E
.125
-
.165
E1
.080
-
.105
e
.095
-
.105
e1 L
.045 .500
--
.055 .610*
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet TP2540.PDF ] | |
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