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PDF TN2540 Data sheet ( Hoja de datos )

Número de pieza TN2540
Descripción N-Channel Enhancement-Mode Vertical DMOS FETs
Fabricantes Supertex Inc 
Logotipo Supertex  Inc Logotipo



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No Preview Available ! TN2540 Hoja de datos, Descripción, Manual

Supertex inc.
TN2540
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
General Description
Low threshold (2.0V max.)
High input impedance
Low input capacitance (125pF max.)
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Applications
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input impedance
and positive temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary
breakdown.
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog and Telecom switches
General purpose line drivers
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
Ordering Information
Part Number
Package Options Packing
TN2540N3-G
TO-92
1000/Bag
TN2540N3-G P002 TO-92
2000/Reel
TN2540N3-G P003 TO-92
2000/Reel
TN2540N3-G P005 TO-92
2000/Reel
TN2540N3-G P013 TO-92
2000/Reel
TN2540N3-G P014 TO-92
2000/Reel
TN2540N8-G
TO-243AA (SOT-89) 2000/Reel
-G denotes a lead (Pb)-free / RoHS compliant package
Refer to ‘P0xx’ Tape & Reel Specs for P002, P003, P005, P013, and P014 TO-92
Taping Specifications and Winding Styles
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSS
BVDGS
±20V
Operating and storage temperature -55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Typical Thermal Resistance
Package
θja
TO-92
132OC/W
TO-243AA (SOT-89)
133OC/W*
* Mounted on FR5 Board, 25mm x 25mm x 1.57mm
Doc.# DSFP-TN2540
A062113
Product Summary
BVDSS/BVDGS
RDS(ON)
(max)
400V
12Ω
ID(ON)
(min)
1.0A
VGS(th)
(max)
2.0V
Pin Configuration
DRAIN
SOURCE
DRAIN
GATE
TO-92
SOURCE
DRAIN
GATE
TO-243AA (SOT-89)
Product Marking
SiTN
2540
YYWW
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-92
TN5DW
W = Code for week sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-243AA (SOT-89)
Supertex inc.
www.supertex.com

1 page




TN2540 pdf
3-Lead TO-92 Package Outline (N3)
D
Seating
Plane
123
A
L
e1
e
b
Front View
c
Side View
E1
1
E
3
2
Bottom View
TN2540
Symbol
Ab
Dimensions
(inches)
MIN
NOM
MAX
.170
-
.210
.014
-
.022
JEDEC Registration TO-92.
* This dimension is not specified in the JEDEC drawing.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version E041009.
c
.014
-
.022
D
.175
-
.205
E
.125
-
.165
E1
.080
-
.105
e
.095
-
.105
e1 L
.045 .500
--
.055 .610*
Doc.# DSFP-TN2540
A062113
Supertex inc.
5 www.supertex.com

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