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PDF TSC83251G2D Data sheet ( Hoja de datos )
| Número de pieza | TSC83251G2D | |
| Descripción | 0.5 Um SCMOS3 Technology | |
| Fabricantes | TEMIC Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TSC83251G2D (archivo pdf) en la parte inferior de esta página. Total 28 Páginas | ||
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Qualpack TSC87251G2D
Qualification Package
TSC87251G2D / TSC83251G2D
0.5 µm SCMOS3 Technology
TSC87251G2D
0.5 µm SCMOS3
1999 October
TEMIC SEMICONDUCTORS IS AN ATMEL COMPANY
Rev. 0 – October 1999
1
1 page  
Qualpack TSC87251G2D
2.1.2 SCMOS3 NV 0.5um EPROM Process
Process type (Name):
Base material:
Wafer Thickness (final)
Wafer diameter
Number of masks
Gate oxide
Material
Thickness
Polysilicon
Number of layers
Thickness Poly1
Thickness Poly2
Metal
Number of layers
Material
Layer 1 thickness
Layer 2 thickness
Layer 3 thickness
Passivation
Material
Thickness
CMOS (SCMOS3 NV - Z94)
Bulk
475 µm
150 mm
22
Silicon dioxide
110 A (optical - 120A electrical)
2
2000 A (amorphous)
3000 A (polysilicon)
3
Ti + TiN + AlCu + TiN
300A Ti + 600A TiN + 5000A AlCu+ 250A TiN
300A Ti + 600A TiN + 5000A AlCu+ 250A TiN
300A Ti + 600A TiN + 6500A AlCu+ 250A TiN
SiO2 / Nitride Oxide
3000A /15000 A
Rev. 0 – October 1999
5
5 Page 
Qualpack TSC87251G2D
3.1 Change Procedure
All changes are controlled by PCN (Product Change Notice). All major changes are notified to the
customers affected by the change.
A major change is defined as a change that requires evidence of no electrical, mechanical impact on the
product, or a change in the specification or marking of the product or packing. The list of changes usually
considered as major is detailed hereafter:
1 General Major Changes
1-1 Manufacturing line
1-2 Sequence of fabrication process cycle
1-3 Material type
1-4 Electrical parameter
1-5 External physical dimension
1-6 Die size
2 Changes specific to wafer fabrication area
2-1 Doping method
2-2 Gate oxide formation method
2-3 Equipment change
2-4 Layer Thickness
2-5 Module dimensions
3 Changes specific to to assembly process area
3-1 Sawing method
3-2 Die attach
3-3 Wire interconnect tools
3-4 Molding process
3-5 Tinning method
4 Changes specific to test area
4-1 Specification limit
4-2 Test coverage reduction
4-2 Product identification
4-3 Final conditioning
Rev. 0 – October 1999
11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet TSC83251G2D.PDF ] | |
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