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PDF IRFD9120 Data sheet ( Hoja de datos )

Número de pieza IRFD9120
Descripción 1.0A/ 100V/ 0.6 Ohm/ P-Channel Power MOSFET
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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No Preview Available ! IRFD9120 Hoja de datos, Descripción, Manual

Data Sheet
IRFD9120
July 1999 File Number 2285.3
1.0A, 100V, 0.6 Ohm, P-Channel Power
MOSFET
This advanced power MOSFET is designed, tested, and
guaranteed to withstand a specified level of energy in the
breakdown avalanche mode of operation. These are
P-Channel enhancement mode silicon gate power field
effect transistors designed for applications such as switching
regulators, switching convertors, motor drivers, relay drivers
and drivers for high power bipolar switching transistors
requiring high speed and low gate drive power. These types
can be operated directly from integrated circuits.
Formerly developmental type TA17501.
Ordering Information
PART NUMBER
PACKAGE
BRAND
IRFD9120
HEXDIP
IRFD9120
NOTE: When ordering, use the entire part number.
Features
• 1.0A, 100V
• rDS(ON) = 0.6
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
Symbol
D
G
S
Packaging
HEXDIP
GATE
DRAIN
SOURCE
4-45
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 page




IRFD9120 pdf
IRFD9120
Typical Performance Curves Unless Otherwise Specified (Continued)
3
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
-100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX.
2 -10
TJ = 150oC
TJ = -55oC
1
TJ = 25oC
-1.0 TJ = 25oC
TJ = 125oC
0
0 -2 -4 -6
I D, DRAIN CURRENT (A)
FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT
0
-5
-0.1
-0.4
-0.6 -0.8 -1.0 -1.2 -1.4 -1.6
VSD, SOURCE TO DRAIN VOLTAGE (V)
-1.8
FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE
ID = -4A
-10
VDS = -80V
-15 VDS = -50V
VDS = -20V
-20
0
4 8 12 16
Qg(TOT), TOTAL GATE CHARGE (nC)
20
FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE
fd
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VGS
tP
RG
VDS
L
DUT
+
VDD
-
IAS
0.01
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
tAV
0
VDD
IAS
tP
BVDSS
VDS
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
4-49

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