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PDF SL1ICS3001U Data sheet ( Hoja de datos )
| Número de pieza | SL1ICS3001U | |
| Descripción | I.CODE1 Label IC Chip Specification | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
SL1 ICS30 01
I•CODE1 Label IC
Chip Specification
Product Specification
Revision 2.1
Public
Philips
Semiconductors
2000-05-02
1 page  
I•CODE1 Chip Specification
3 Scope
Rev. 2.1
May 2000
This specification describes the electrical, physical and dimensional properties of unsawn and sawn
wafers on FFC of I•CODE1 Label ICs on a Philips 6C15 IDFW process and is the base for delivery
of tested I•CODE1 Label ICs.
General recommendations are given for storage, handling and processing of wafers as well as
assembly of labels.
Reference documents:
MIL-STD 883D Method 3023
MIL-STD 883D Method 3015
SNW-FQ-627
PICTOH-QS007
General Specification for 6” Wafer (Prod. Spec.)
General Quality Specification
I•CODE1 Label IC, Coil Design Guide
This product specification is valid for VCOL1V0 from mask revision P/B upwards.
4 Ordering Information
Following ordering options are available:
Type Name
SL1 ICS30 01W/N5D
SL1 ICS30 01U/N5D
SL1 ICS30 01U/L6D
Description
Sawn wafer on foil (FFC), 150 µm, inked and mapped
Unsawn wafer, 150 µm, inked and mapped
Unsawn wafer, 525 µm, mapped (not inked)
Ordering Code
9352 644 66005
9352 644 65025
9352 644 64025
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5 Page 
I•CODE1 Chip Specification
8 Documentation
Rev. 2.1
May 2000
8.1 Delivery Documentation
Each wafer container and each larger shipment container is individually marked with the
identification information as follows:
• Diffusion Batch number (wafer lot number)
• Part designation (type) with revision number
• Ordering code (see chapter 4)
• Date code of lot acceptation
• Good die quantity
The print out of the final test results is attached to the packing and contains the good die quantity
related to every wafer number.
8.2 Fail-Die Identification
Every die is electrically tested according to data sheet. Identification of chips, which do not confirm
with the electrical parameters of the data sheet is done by inking and/or wafer mapping (all dies at
wafer periphery are identified by ‘FAIL’).
8.2.1 Ink Dot Specification
Diameter:
Height:
Colour:
Position:
Attributes:
min. 0.4 mm
max. 20 µm
black
central third of die (x, y direction)
opaque, water resistant
NOTE: Uncompleted dies with an area < 95 % (wafer periphery) are not inked!
8.2.2 Wafer Mapping
Wafer mapping for failed die identification is available on Floppy-Disk.
Format:
Electroglas ESC–ASCEND on 3.5″ Floppy-Disk
NOTE: The wafer map refers to unsawn wafers. At sawn wafers (on FFC) additional ICs
might be inked (marked as fail) if damaged during the sawing process (compared to
wafer map)!
See Appendix D for an example of the wafer map.
SL040521.doc/M
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Page 11 of 22
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet SL1ICS3001U.PDF ] | |
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